Items tagged with sapphire rapids
Intel held its annual Architecture Day earlier this week, and it’s safe to say that members of the press and analyst communities were waiting with baited breath for the deep dive disclosures on the company’s next-gen silicon architectures and products that are typically unveiled at the event. This year, Intel gave us a densely-packed view of what it has in store for PC consumers, the enterprise and data centers. From Alder Lake to Intel Arc, Sapphire Rapids, Ponte Vecchio and more, Intel laid down the gauntlet in fair detail on a number of fronts. As usual, there was a lot to digest, so strap in and we’ll cover the key take-aways. Under The Hood Of Alder Lake – Intel’s...
Read more...
The next generation of Intel's Xeon Scalable processors codenamed Sapphire Rapids will feature high bandwidth memory (HBM), the company confirmed at the 2021 International Supercomputing Conference (ISC). This is intended to provide "a dramatic boost in memory bandwidth," as well as offer a "significant" jump in high performance computing (HPC) applications that deal with memory bandwidth-sensitive workloads, Intel says. It was long rumored that Sapphire Rapids would bring on-die HBM to Intel's big iron for datacenters, and today's announcement lays to rest any doubt. This will potentially benefit a wide range of workloads, including modeling and simulation, artificial intelligence, big data...
Read more...
Intel talked a little bit about Sapphire Rapids, its next generation Xeon Scalable processor lineup, during its Architecture Day 2020 event last August. While it has always been assumed Sapphire Rapids will leverage Intel's upcoming Golden Cove architecture, just like Alder Lake, this has never been officially confirmed. Until now, that is. It might be more of an inadvertent confirmation, or one that Intel was not necessarily ready to make public. Either way, a Linux engineer at Intel spilled the beans in a recent patch. In the patch notes, Intel's Andi Kleen clarifies an association with Sappire Rapids-X, which was previously labeled as being based on the Willow Cove architecture. "Sapphire...
Read more...
Past leaks have suggested that Intel's upcoming 4th Gen Xeon Scalable server processors codenamed Sapphire Rapids will flex up to 56 cores and 112 threads of big iron, but maybe an even bigger flex is in store. A user who got their hands on a supposed Sapphire Rapids engineering sample did onlookers a solid by peeling away the integrated heatspreader, to reveal some interesting details. We have seen Sappire Rapids in the wild before, assuming the leaked photos that popped up in February were not fake. They showed the top and bottom of an engineering sample. That leak also came with an accompanying pin diagram, which depicted a new LGA4577-X socket. The additional pins over LGA4189 enable some...
Read more...
Earlier this week, Intel formally introduced the world to its 3rd Gen Xeon Scalable processors, its first server chips built on a 10-nanometer manufacturing process. Otherwise known as Ice Lake-SP, these are being offered in up to 40-core/80-thread configurations, up from 28-core/56-thread configs with its 2nd gen products. Looking ahead, however, rumor has it Intel's 4th Gen Xeon Scalable processors codenamed Sapphire Rapids will feature up to 56 cores and 112 threads, along with some additional goodies. Sapphire Rapids is not a complete secret. In fact, Intel talked a little bit about Sapphire Rapids during its Architecture Day 2020 event, noting that its upcoming Xeon processors are based...
Read more...
The end of the year is typically thin on interesting news in the technology sector, as companies opt to wait for the Consumer Electronics Show (CES) in January to make any major announcements or product unveils. There are exceptions, however. Just before we ring in another year, Intel has posted an interesting document that essentially confirms its upcoming Xeon Scalable processors based on Sapphire Rapids will support on-package high bandwidth memory (HBM). While previously rumored, this is a feature Intel has not explicit stated up to this point. During its Architecture Day 2020 event this past summer, Intel talked a little about Sapphire Rapids (among other things), noting it is based on an...
Read more...
When it comes to high-speed interfaces for storage and graphics, PCIe 4.0 has been a known quantity (at least for consumers) since AMD launched its Ryzen 3000 Zen 2 platform during the summer of 2019. Intel embraced PCIe 4.0 this year with the release of Tiger Lake, although laptop manufacturers have yet to leverage the higher data transfer rates available with PCIe 4.0 SSDs. To that end, Intel is already looking towards PCIe 5.0, and this week announced that it has worked with Synopsys to demonstrate operability with its next-generation Xeon Scalable processors, aka Sapphire Rapids. For the demonstration, Intel made use of the Synopsys DesignWare controller and physical interface (PHY)....
Read more...
