Items tagged with HPC
The name "Flashbolt" sounds like it could be a comic book superhero, or a spell you cast when running up against some ruffians in a role playing game. Neither of those things are what Samsung had in mind when launching Flashbolt, which is actually its third-generation high bandwidth memory 2E (HBM2E) designed for high performance computing (HPC) applications. Samsung's unveiling comes hot on the heels of JEDEC publishing an updated revision of the HBM2 standard called JESD235C. The updated standard pushes speeds to 3.2Gbps per pin, paving the way for 410GB/s of memory bandwidth per stack. And so it goes with Samsung's new Flashbolt solution, which adheres to those specs. "With the introduction...
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The brain is the most complex organ in the body and the most difficult to unravel. Scientists have developed a variety of ways to better understand the brain, including the use of supercomputers. The world’s largest neuromorphic supercomputer, the Spiking Neural Network Architecture (SpiNNaker), was just switched on for the first time yesterday. The mammoth array of server cabinets boasts one million processor cores and is able to perform 200 trillion actions per second. SpiNNaker has been twenty years and ￡15 million (nearly 19.5 million USD) in the making. The project was originally supported by the Engineering and Physical Sciences Research Council (EPSRC), but has been most recently...
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Forget about running two graphics cards in SLI, imagine having 16 GPUs working in tandem to crunch through intensive workloads. That would be pretty awesome, right? It's also attainable, at least to certain audiences. NVIDIA today unveiled its HGX-2, a cloud server platform outfitted with 16 Tesla V100 Tensor Core GPUs working as a single, giant GPU to deliver a staggering two petaflops of performance geared towards artificial intelligence. Yes folks, this thing could run Crysis, if that's what it was designed for. It's not, of course, nor is it for playing games in general. NVIDIA is pitching the HGX-2 as the first unified computing platform for both AI and high performance computing (HPC)....
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Today’s opening keynote at the Intel Developers Forum focused on a number of forward-looking AI, deep learning, connectivity and networking technologies, like 5G and Silicon Photonics. But late in the address, Intel’s Vice President and General Manager of its Data Center Group (DCG), Diane Bryant, quickly dropped a few details regarding the company’s next-generation Xeon Phi processor, codenamed Knights Mill.Knights Mill is designed for high-performance machine learning and artificial intelligence workloads, and is currently slated for release sometime in 2017. According to Bryant, Knights Mill is optimized for scale-out analytics implementations and it will include architectural enhancements...
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The Heterogeneous System Architecture (HSA) Foundation is making waves this week with the announcement of the HSA Specification v1.0. The HSA 1.0 spec is aimed at ushering in a new wave of heterogeneous computing devices that efficiently harness the power of both CPUs and GPUs. HSA is not only destined to impact high-performance computing (HPC) and desktop platforms — as one would expect — it will also impact mobile devices including smartphones, tablets, and notebooks. HSA will make it easier for programmers to “efficiently apply the hardware resources in today’s complex systems-on-chip (SOCs),” including tapping directly into the GPU. Through the use of “heterogeneous queuing,” GPUs will be...
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Intel today made a splash at the International Supercomputing Conference in Leipzig, Germany by revealing new details about its next-generation Xeon Phi processor technology. You may better recognize Xeon Phi by its codename, Knights Landing, which we covered in some detail earlier this year. No matter what you call it, this represents a significant leap in High Performance Computing (HPC) that will deliver up to three times the performance of previous generations while consuming less power. A big part of the reason for this is the construction of a new high-speed interconnect technology called Intel Omni Scale Fabric, which Intel has been a bit cagey about, though reportedly it is comprised...
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Like any smart company, NVIDIA is always looking for new markets and segments to dig into, and the company is doing just that with a push into high-performance computing (HPC). NVIDIA announced that its Tesla GPUs are being used to bring ARM64-based servers to a new level of performance. There are several vendors using the Tesla GPU accelerators in their ARM64 servers, including Cirrascale, E4 Computer Engineering, and Eurotech. “Featuring Applied Micro X-GeneARM64 CPUs and NVIDIA Tesla K20 GPU accelerators, the new ARM64 servers will provide customers with an expanded range of efficient, high-performance computing options to drive compute-intensive HPC and enterprise data center workloads,”...
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Netflix has long chased after methods of improving its movie recommendation algorithms, once even awarding a $1M prize to any team of people who could substantially improve on the then-current design. As part of that process, the company has been researching neural networks. Conventional neural networks are created with vast nodes of CPU clusters, often with several thousand cores in total. Netflix decided to go with something different, and built a neural network based on GPU cores. In theory, GPU cores could be ideal for building neural nets -- they offer huge numbers of cores already linked by fast internal interconnects and with relatively large pools of onboard memory. Whether or not the...
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New details on Intel's upcoming 14nm Xeon Phi (codenamed Knights Landing) suggests that the chip giant is targeting a huge increase in performance, throughput, and total TFLOP count with the next-gen MIC (Many Integrated Core) card. Knights Landing will be the first ground-up redesign of Intel's MIC architecture -- the original Knights Ferry card was a repurposed Larrabee GPU, while the current Knights Corner-based MIC still has texture units integrated on-die left over from its GPU roots. RealWorldTech has published an expose on the upcoming architecture, blending what we know of the new design with some intelligent speculation about its overall structure and capabilities. Knights Landing will...
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Last month, Intel brought us out to the Texas Advanced Computing Center (TACC) in Austin to brief us on its latest and greatest foray into high-performance computing (HPC) and exascale level processing performance. For Intel, years of heady talk about parallelism and exascale computing have finally come to fruition. Intel is bringing to market a pair of Xeon Phi coprocessor offerings in 2013, the 3100 family and the 5110p, and we’ve got the full scoop for you here... Intel’s Exascale HPC Revolution and Xeon Phi...
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Last month, Intel brought us out to the Texas Advanced Computing Center (TACC) in Austin to brief us on their latest and greatest foray into high-performance computing (HPC) and exascale level processing performance. Parallel Computing and the Road to Exascale There are mountains of problems that need to be solved and a myriad of insight to be gained, in fields from the sciences to national security, that require HPC and highly parallel processing to most effectively and efficiently solve. Parallel processing is what the HPC space is all about, and when large amounts of data can be processed and complex problems solved, it can help researchers move from the concept phase to the...
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At the supercomputing conference SC2011 today, Intel offered up performance details of its upcoming Xeon E5 processors and demoed their Knights Corner many integrated core (MIC) solution. The new Xeons won't be broadly available until the first half of 2012, but Santa Clara has been shipping the new chips to "a small number of cloud and HPC customers" since September. The new E5 family is based on the same core as the 3960X Intel launched yesterday, but the company has been surprisingly slow to ramp the CPUs for mass production. Rajeeb Hazra, general manager of the Intel Datacenter and Connected Systems Group, stated that demand for the new chips was stronger than anything Intel had seen before....
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Last month, we discussed the split between IBM and the NCSA (National Center for Supercomputing Applications) over the highly ambitious 'Blue Waters' project. Blue Waters was the name of a planned supercomputer that would've been entirely water-cooled and included as many as 524,288 CPU cores. The disintegration of the deal came as some surprise, given the amount of work that'd already been done on the project. New details have come to light on why the University of Illinois and IBM ultimately parted ways over the project. One of the major issues appear to have been the clock speeds of the CPUs. The project selected IBM in 2007 as the supercomputer vendor for the Blue Waters project based on...
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NVIDIA has just announced the addition of CTO Steve Scott to the company’s Tesla Business unit. Steve Scott was the chief architect of the Cray X1 and was involved in the design of the Cray XT, Cray XE and "Cascade" systems as well. According to his bio, Steve Scott holds 27 U.S. patents in the areas of interconnection networks, cache coherence, synchronization mechanisms and scalable parallel architectures and has also served on numerous program committees and as an associate editor for the IEEE Transactions on Parallel and Distributed Systems. He served 19 years at Cray, the last six as a senior vice president and CTO, responsible for defining Cray's technology and system architecture...
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