Intel Lunar Lake CPU Deep Dive: Chipzilla’s Mobile Moonshot

It was the case for a very long time that if you were buying a laptop, you were almost assuredly getting an Intel processor. Sure, AMD was around, and there have always been Macbooks, but both were niche products at opposite ends of the market for ages. For the overwhelming majority of users, only Intel offered the compelling combination of performance and efficiency to make a laptop sensible, but Intel's dominance in the important laptop market has been under assault recently.

First, Apple dramatically broke away from Intel by debuting its own home-grown silicon that offers astonishing efficiency, and then rival AMD came surging with Ryzen SoCs offering killer x86 performance and powerful graphics hardware. Most recently, Qualcomm has come out swinging with its own crazy-efficient Snapdragon X Elite processors. Intel has managed to hold on to the high-end gaming laptop market for the most part, but Chipzilla is heavily embattled in the critical "thin & light" market.

As a return salvo, we now have the new Lunar Lake processors. Slim and trim, Lunar Lake represents a paradigm shift along numerous axes for Intel. Rather than being scaled-down from a higher-power product, Lunar Lake was built specifically for the thin & light laptop market, and it represents Intel's best effort to go head-to-head against its competitors.

The name of the game this time around is efficiency. Many people have written about the supposed limitations of x86(-64) with regards to power efficiency, but Lunar Lake is here to set all that to rest. The company says that "you've probably never seen x86 power characteristics quite like this," and indeed, it claims that these parts undercut AMD's Ryzen 7 7840U and Qualcomm's Snapdragon 8cx Gen 3 by 30% and 20% respectively in terms of power consumption during Microsoft Teams conferencing. Impressive stuff.

Where Meteor Lake was focused on the transition to tiles and saw few revisions to the IP, every single part of the Lunar Lake package has new engineering. From the move to on-package LPDDR5X memory, to the tightly-optimized Lion Cove P-cores, the radically-revised Skymont E-cores, the Xe2 graphics processor, the 4th-gen NPU, and even to major improvements for the thread-scheduling and thermal-monitoring hardware, this is truly Intel's full-court press against the competition.

We're going to talk at length about the new cores, the new GPU hardware, and the new NPU silicon in the coming pages, but first let's talk just a little bit about the construction of this new SoC and how it's packaged. Lunar Lake comprises no less than seven parts, as you can see in the slide above. The meat of the work is done on the Compute tile, which includes all of the processing elements, while the Platform Controller tile is essentially analogous to an old-school "northbridge." It provides I/O and other system functions. The Compute tile is fabricated on TSMC's N3B process, while the Platform Controller tile is fabricated on TSMC N6.

All of this rests on a base tile, connected through a Foveros linkage, and then that sits on the package interposer, to which two LPDDR5X DRAM packages are also connected. Indeed, just like Apple's M-series processors, Intel is shipping the RAM exclusively on-package for Lunar Lake. The available memory configurations will include 16- and 32-gigabyte capacities with speeds up to 8,533 MT/s—a solid jump from Meteor Lake's 7,467 MT/s maximum configuration.

Of course, an improved transfer rate isn't the reason Intel decided to move the memory on-package. It's because it reduces the power consumed by the memory interface by as much as 40%, in addition to radically reducing the complexity and amount of physical area required on the system's motherboard. The only real downside to this move—and it is a big one—is that the RAM can't be repaired or upgraded; if the RAM on your Lunar Lake laptop fails, it's time to replace the whole motherboard. That's not really different from when soldered-on memory fails, though, at least for an end user.