AMD Naples Server Platform Architecture Could Disrupt The Data Center
We learned a lot about the Zen microarchitecture and the consumer-targeted Ryzen 7 series of desktop processors at AMD’s tech day a couple of weeks back. Much of the information we gleaned from AMD at the event, in addition to the numerous leaks, rumors, and official news items that trickled out over the last couple of years, was explained in our Ryzen 7-series launch coverage – which you can check out right here.
There were some other interesting bits of information disseminated at tech day that we weren’t able to reveal in our launch piece, however, related to AMD’s Zen-based server platform, codenamed Naples. As we’ve mentioned in the past, Naples is an up to 32-core / 64-thread variant of Zen, targeted at enterprise and data center applications. Today, we can reveal a few more technical details and discuss some interesting performance comparisons AMD made against one of Intel’s flagship 2P Xeon configurations. Spoiler alert – Naples looked very strong.
In addition to 32-processor cores, Naples is packing massive amounts of I/O connectivity. The processors will feature eight-channel DDR4 memory controllers (with up to 16 DIMMs attached per CPU), with support for up to 4TB of memory, and 128 lanes of on-die PCI Express connectivity, minimizing or negating the need to incorporate latency-inducing PCI Express switches into server designs.
In a 2P (dual processors / dual socket) configuration, Naples offers up to 64 physical scores (128 threads), access to 32 DIMM slots and an aggregate 16 memory channels. Versus a 2P Intel Xeon E5-2699A V4 based server, the 2P Naples setup ends up with double the memory channels, a higher total memory capacity, many more cores (20 more physical cores, 40 more threads), and 48 more available PCI Express lanes. Note that 64 PCI Express lanes and AMD’s Infinity Fabric protocols are used to link the processors in a dual-socket setup, so 128 lanes remain available for other devices.
Since Naples, like most modern processors, is a SoC, the memory controller and much of the I/O exists on the processor die. As such, the motherboard chipset is essentially a basic I/O hub, which allows for a more elegant, cleaner, simpler designs than legacy architectures. The processors reside in the sockets, with memory hanging right off of the processors’ integrated memory controllers, and PCI Express is used to connect the sockets, and any external devices.
We saw an AMD Naples-based 2P server in action, packed with a full load-out of memory. The processors and all of the DDR4 RAM in the system are lined up behind the blowers / cooling fans, but right in front of the expansion slots and IO. AMD also put this system up against a high-end 2P Xeon server and shared some interesting performance results, which we’ll show you next...