AMD Ryzen 8000 Strix Point Rumors Detail 12-Core Hybrid Zen 5 And RDNA 3.5 Specs
Strix Point seems like it's going to be a little different from the current generation chips, though. According to the leaks and rumors we've seen, it seems like AMD's next-generation mobile processors will include more CPU cores, more cache, and a bigger GPU in comparison to chips like the Ryzen 7 7840HS. Simply saying that is a little misleading, though, because it'll actually have significantly different CPUs and less cache per core.
Here's a refresher on Ryzen CPU topology terms: a CCX is a "core complex", which typically means the collective unit of some number of CPU cores as well as their associated L3 cache. A "CCD" is a "Core Compute Die", or a piece of silicon that includes one or two CCXes. On early Zen products, one CCX was four cores and 8MB of L3 cache, while Zen 2 increased the cache to 16MB and then Zen 3 combined the two CCXes on one CCD into a single unit, giving that unit eight cores and 32MB of L3 cache.
With Zen 4, AMD has created the concept of the "dense core." Otherwise known as "Zen 4c", these cores appeared first in its "Bergamo" EPYC CPUs. Those chips have up to 128 CPU cores in a single socket, and they accomplish this through the use of Zen 4c. Unlike Intel's "e-cores" which are an entirely different architecture from its P-cores, Zen 4c is a completely-capable and compatible Zen 4 processor core, with the only functional difference being that it has one-half the L3 cache. It's also significantly denser in terms of design. Using Zen 4c, AMD is able to pack two eight-core CCXes in basically the same space as a single regular Zen 4 CCX.
So, what does that have to do with Strix Point? Well, according to the rumors we've seen, AMD's first Zen 5-based mobile processor will have a hybrid configuration, with one CCX of four Zen 5 cores and their associated 16MB of L3 cache, and then another CCX with eight Zen 5c cores and another 8MB of L3 cache for them. Due to their density, the "compressed" cores don't clock as high as regular cores, and so this is sort-of similar to Intel's strategy—it just allows the whole CPU to run the same code, as there's no missing instructions or capabilities in the Zen 5c cores, unlike with Intel's Gracemont e-Cores in Alder and Raptor Lake CPUs.
Interestingly, while the C-cores are short on L3 cache (having just one-half of even Phoenix, which already has one-half the L3 cache of a desktop CPU), the four standard Zen 5 cores get 4MB per core, which is the same allotment as desktop CPUs and more than AMD has ever put in a monolithic mobile processor.
As far as the GPU side of things goes, it's fairly straightforward: RDNA 3.5 architecture—whatever that actually means, because don't know yet—and eight Work Group Processors (WGPs), which roughly equates to 16 compute units in the old GCN nomenclature. Assuming RDNA 3.5 keeps the dual-issue capability of the extant RDNA 3 processors, and assuming Strix Point's iGPU can hit the same 2.8 GHz clock as Phoenix Point, we're looking at a GPU in a similar performance class to the PlayStation 4 Pro. Of course, memory bandwidth will probably be the limitation, as ever.
That's one thing the leaks haven't talked about yet: clock rates. AMD will have specifications for the processor's clocks, but we expect that these will vary quite a bit based on the individual Strix Point model as well as the implementation. It's possible, that in some high-power form, we might see pretty high clock rates even out of the Zen 5c cores. On the other hand, in most laptops, it's likely that those chips won't pass 3 GHz. We haven't seen a mobile part with C-cores yet, so we don't know what it's going to look like.
We won't know for a while, either. Strix Point is expected to appear around a year from now, sometime in the middle of 2024. If the rumors are correct, it'll be followed by a unique chiplet processor called Strix Halo that features a massive 20 WGP GPU and a double-wide memory interface to feed it.
