Intel Starts Fusing Off AVX-512 In Alder Lake Silicon To Thwart BIOS Workarounds

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Ever since the advent of the Multi-Media eXtensions, better known as "MMX," Intel has had a long history of tacking on instruction set extensions to add additional capabilities to its x86-family of CPUs. There have been many other instructions for other purposes, but arguably the most important additions to the ISA have been those that expand the SIMD capabilities of x86 CPUs.

MMX was the first, but several editions of Streaming SIMD Extensions (SSE) came next, followed by the Advanced Vector eXtensions (AVX) with the landmark Sandy Bridge architecture in 2011. Since then, we've seen further extensions, including AVX2 with Haswell in 2013 and then AVX-512 in Skylake-SP. Actually, AVX-512 debuted with the Knights Landing Xeon Phi processors, but we digress.

The AVX-512 extension has been fraught with frustrations since its launch. Originally it was only available on rare Xeon Phi processors, and then confusingly it first appeared in consumer parts with the low-power mobile family Ice Lake, with a different subset of functions. Intel's 11th-gen Rocket Lake processors finally included AVX-512 instructions, but then Intel opted not to support them on 12th-gen Alder Lake CPUs for reasons that were unclear at first.

There was confusion on this matter even before the CPUs launched. Intel engineers stated AVX-512 would work as long as you disabled the processors' low-power E-cores, because they don't support it. Intel's management and/or marketing staff said otherwise, noting the feature isn't supported, and you can't use it, so don't.

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PlayStation 3 emulator RPCS3 is one such use-case for AVX-512.

People did anyway, of course. Intel instructed motherboard makers to ship firmware updates to disable the feature altogether, even if you shut down the E-cores on your CPU. Still, intrepid firmware hackers have been turning AVX-512 back on, one motherboard at a time. MSI even took the matter into its own hands, and offers the option to run an older CPU microcode on at least one motherboard, re-enabling the feature.

Well, that's not going to be an option for long, at least for upcoming CPU purchases. Intel it is now fusing off the AVX-512 capability in new Alder Lake processors. The boys over at Tom's Hardware got a tip that newer batches of Alder Lake CPUs can't enable AVX-512 at all. They proceeded to inquire with Intel, which confirmed that AVX-512 will be fused-off on Alder Lake going forward. If you want double-wide vectors, you'll have to pony up for a Xeon.

The actual net gain to Intel from this action seems rather minor. AVX-512 has limited use-cases, and it already required hacky workarounds to say nothing of the loss of half or more of your CPU's cores just to get it working on Alder Lake. Allowing the feature to live on, functional yet unsupported for 12th-gen CPUs (along the same lines as overclocking), seemed reasonable to us. But hey, we don't get paid to make those decisions.

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Alder Lake die shot with the AVX-512 units marked off. Image: Igor's Lab

Intel's hybrid architecture design is a big gamble, and it's not completely clear yet to everyone that it has necessarily paid dividends in terms of efficiency or performance on various platform types. If even a small subset of users are disabling their E-cores and then seeing drastically improved performance, the story could go viral and make Intel's design choices look off the mark, causing the company to lose face.

As such, it seems more likely to this author that this action is driven by ideology rather than by income. On the other hand, even if Western investors may not care when their company is cast in a less-than-positive light, that sort of thing is taken much more seriously in Asia. From that perspective, perhaps it's about money after all.