NVIDIA's Next-Gen Feynman GPUs May Use TSMC's Advanced A16 Chip Node

Remember Tensordyne, who promised to slash AI GPU power consumption with a new way of doing things? That entire pitch was basically predicated on the power predicament that the industry finds itself in. Put simply, there's just not enough electricity to scale out the world's AI compute demands. That's likely why NVIDIA is reportedly willing to pay top dollar to be the very first customer for TSMC's A16 process—at least, according to Commercial Times Taiwan.

NVIDIA's current-generation AI GPUs are using the Blackwell architecture, and next comes Rubin, in the middle of next year. After that, the company has promised the Feynman design in 2028. Architectural innovations remain important, but the current-generation Blackwell Ultra parts are already drawing 1.4 kilowatts per package, and Rubin is expected to exceed two kilowatts. Considering an NVL rack-sized GPU contains 72 GPU packages along with all kinds of assorted other high-end hardware, you're talking about over a hundred thousand watts—120 kW for Blackwell Ultra, and likely over 180 kW for Rubin, with the further Rubin Ultra being even more power-thirsty.


Versus TSMC's own N2P process, the foundry predicts that A16 will allow a 20% power reduction at the same speed. NVIDIA's more likely to pursue the 8~10% speed improvement at the same power, though—or rather, NVIDIA's more likely to increase power yet again to pursue even higher peak AI performance. We're just guessing; we have no particular knowledge of NVIDIA's plans, but historically, NVIDIA has chosen to scale up power as far as possible within the limitations of processor fabrication. Blackwell already uses two reticle-sized GPUs per package, and Rubin will do the same on a denser process.

What gives TSMC's A16 these gains over N2P? Well, for starters, it's going to use stacked nanosheet transistors, much like Intel's RibbonFET that it will debut with 18A later this year. TSMC's debuting nanosheets with its N2 process, so it's not far behind its American rival. However, where TSMC is lagging a bit is in implementation of a Back-Side Power Delivery Network, or BSPDN. Intel's also bringing that technology to market with 18A, while TSMC won't have its Super Power Rail tech available until A16 in late 2026.

As we noted above, NVIDIA is likely going to be one of the very first companies to use A16, specifically on its Feynman AI chips. That means that TSMC's Super Power Rail back-side power delivery network will debut with NVIDIA's Feynman. Interestingly, TSMC says that its Super Power Rail is "best-in-class," seemingly denigrating Intel's competing PowerVia tech. It will be fascinating to see if TSMC's technology is actually superior to Intel's, and also whether the Taiwanese firm faces challenges with yields as Intel supposedly has.