Innosilicon First To Ship LPDDR6 Memory IP At Blistering 14.4Gbps Speeds

Chinese IP vendor Innosilicon, who we previously reported hitting 10 Gbps with LPDDR5X, has announced the first commercial delivery of its LPDDR6 memory controller and PHY IP, marking an early milestone in the rollout of the next-generation low-power DRAM standard. The company says its LPDDR6/LPDDR5X combo IP has now been shipped to initial customers, with support for data rates up to 14.4Gbps per pin.

To be clear, this announcement does not involve shipping physical memory chips. Instead, Innosilicon is delivering licensable interface IP—logic blocks that chip designers integrate into their own system-on-chip designs to communicate with external LPDDR memory. While less visible than CPUs or GPUs, these blocks are essential for any SoC intending to support a new memory standard.

The LPDDR6 standard was released by JEDEC in July of 2025, and is designed to roughly double effective bandwidth over LPDDR5X while maintaining low power consumption. The standard achieves this through both higher per-pin data rates and a wider I/O architecture, increasing channel width from 16 bits to 24 bits per channel. Innosilicon claims its implementation reaches the top end of the spec at 14.4 Gbps per pin, and is fully backward-compatible with LPDDR5X, allowing customers to support both standards using the same IP.

According to the company, the IP has been validated across multiple advanced process nodes and is intended for use in AI accelerators, automotive SoCs, and other bandwidth-sensitive designs. Innosilicon also emphasizes its experience delivering DDR, GDDR, and HBM interface IP as evidence of signal-integrity and reliability work already done.


For U.S. and other Western chipmakers, the real practical impact of this announcement is a bit limited. Major vendors such as Apple, AMD, Intel, NVIDIA, and Qualcomm typically design their own in-house memory controllers and PHYs, tightly coupling them to their CPU, GPU, and cache architectures. These companies were never likely going to be early customers for merchant LPDDR6 IP, and this announcement doesn't really affect their product roadmaps. You probably won't see Innosilicon LPDDR6 IP in an Intel CPU.

Where the news matters more is in the Chinese semiconductor ecosystem. China-based CPU and SoC vendors such as Zhaoxin, Hygon, Loongson (et al.) increasingly need access to advanced, production-ready interface IP as export controls and geopolitical constraints limit their access to Western suppliers. A licensable, JEDEC-compliant LPDDR6 controller enables these companies to plan competitive designs for the 2027-2028 timeframe without relying on foreign IP vendors that may become unavailable.

More broadly, Innosilicon's announcement signals that LPDDR6 is finally moving beyond paper specifications and into real silicon planning, as the availability of merchant IP is often one of the final prerequisites before a new memory standard sees widespread adoption. While we won't see LPDDR6 devices pop up immediately, the infrastructure required to support them is now beginning to take shape. We expect LPDDR6 devices to hit the market sometime this year.