IDF Processor Roadmap Update

Although we didn't get the opportunity to make it to this year's summer IDF, Intel has made a number of interesting and newsworthy annoucments about their processor roadmap that we're sure many of you may have already caught wind of.  Of particular note of course is the fact that Intel is completely re-architecting their Desktop Dual Core CPU, moving away from the Prescott Dual Core, to a 4 issue core with a much shorter 14 stage pipeline.

Our friends at Intel sent us a few tid-bits from the IDF Day 1 slide-set.


We'll summarize things a bit for you here and touch on the top salient take-aways.  In short, Intel is taking the best features of both their Desktop and Mobile platforms and combining them with new technology and innovations in a migration that could be their most compelling and interesting product effort in many years.  With a wider 4 issue engine, shorter 14 stage pipe (read much less penalty on branch misses), more efficient internal cache and external memory access, Intel seems to be poised to put their core architecture back on course for a much higher IPC capable product.  

One burning question that remains is, what will be feeding those mult-core CPUs with system bandwidth? Are we still talking about a QDR system bus or will the next generation Pentium go the way of higher bandwidth serial connectivity to get on and off chip?  With multiple faster CPU cores banging away for system bandwidth.  That may be the $64,000 question.  Or maybe not if Intel has something else up their sleeve.