AMD & Intel Reflect On First Year Of x86 Ecosystem Alliance And Outline What's Next

Last year, AMD and Intel formed the x86 Ecosystem Advisory Group. On the cusp of their one year anniversary, AMD has released a blog post detailing the advancements made by AMD, Intel and "key ecosystem partners" in the time since, as well as setting some future expectations. The four things AMD highlights are the standardization of FRED (Flexible Return and Event Delivery), the establishment of the AVX10 and ChkTag instruction sets, and the addition of ACE (Advanced Matrix Extensions for Matrix Multiplication). Of the four, the most compelling for most users will likely be AVX10 and ChkTag. FRED and ACE are developer-centric advancements, but should still result in more stable applications and more scalable development experiences, respectively.


AVX10, debuted by Intel some time ago, is a refinement of the AVX-512 instruction set which has now been standardized "across client, workstation, and server CPUs". This means that essentially all mainstream CPUs properly support AVX-512 and AVX10 instructions, which was not the case back when AVX-512 debuted.

ChkTag is an x86 memory tagging system that accounts for both malicious actors and bad programming, by allowing supported hardware to detect violations that would otherwise cause memory leaks or memory errors that could disrupt system security. These include buffer overflows and misuses of freed memory, but requires hardware support. Fortunately, software built with ChkTag support is still backward-compatible with processors that don't have ChkTag built-in.

Intel and AMD have already made important strides together, especially with the standardization of AVX10. Future goals of the x86 EAG stated in the original blog post include "adding new strategic ISV partners, evaluating new ISA extensions that provide demonstrable advantages, and reinforcing the long-term stability and predictability of the x86 architecture". As long as the Advisory Group and adjacent channels of communication are maintained, that should ensure these goals are met and advancements to x86 architecture like AVX10 continue to be seamlessly implemented across AMD and Intel CPUs alike.