Zen 4 Ryzen 7000 Rumored For April Production As AMD Patents 3D-Stacked AI CPU Accelerators
That information comes by way of a somewhat-cryptic tweet from frequent leaker Greymon55 early this morning. Their statement, "a painter will go into mass production later this month," can only really apply to AMD's next-generation CPUs—they're codenamed "Raphael" after all, named after 16th-century Italian artist Raffaello Sanzio da Urbino.
AMD's Raphael processors are particularly notable not only for introducing the Zen 4 architecture, but also for purportedly being the first mainstream desktop AMD CPUs to include integrated GPUs, at least if rumors are to be believed. They're also expected to bring a significant single-core performance uplift over Zen 3, but core counts will supposedly remain the same.
Nobody knows for sure when Zen 4 will hit the market, in large part because it seems like AMD isn't quite sure itself. However, in a followup tweet, Greymon55 confirms that mass production is starting ahead of expectations. This follows comments back in February that AMD's next-generation CPU design would see a release before September 22nd, when previously it was thought AMD would wait until Q4 this year.
Of course, a cutting-edge semiconductor player like AMD has to be looking ahead to the future, so Zen 4 is hardly the end of its roadmap plans. AMD's competitors are going hard on machine learning acceleration in the enterprise space. In addition, AMD also has potent AI accelerators already in the form of its Instinct lineup, particularly the massive dual-die Instinct MI250X.
Some of the benefits of doing AI on CPUs are due to their "location" within the system. Having a direct line to system memory as well as to all of the rest of the system's I/O can drastically improve both throughput and latency when accessing those resources.
Well, AMD might be looking to accomplish the best of both worlds. In a patent first filed back in September of 2020 but published just recently, AMD details a method for stacking a machine-learning accelerator on the I/O die of a chiplet-based processor.
Interestingly, the patent doesn't actually specify the type of processor, nor the specific class of machine-learning accelerator. It could perhaps be a GPU, a custom bit of fixed-function silicon, or even an FPGA. Afterall, AMD did just finalize its purchase of FPGA powerhouse, Xilinx. The patent illustrates how the company would wire the accelerator directly into the data fabric of the processor via 3D stacking, much like it does now with its 3D V-Cache implementation on the forthcoming Ryzen 7 5800X3D.
It's certainly an interesting idea, and given its applications, we definitely expect to see this sort of thing within the company's EPYC lineup—to say nothing of the presence of four "processor chiplets" in the diagrams for the patent. There's no mention of 3D stacked cache in the text of the patent, so we wonder if the two technologies are compatible.
