Intel Unveils New Atom and Xeon Processors and Future Rack Scale Architecture at IDF Beijing

At the Intel Developers Forum currently underway in Beijing, Intel revealed a number of details regarding future Atom and Xeon processors and proposed server and rack-level enhancements to improve efficiency and ease upgrades moving forward.

As Diane Bryant (senior vice president and general manager of Intel’s Datacenter and Connected Systems Group) revealed, the company will soon refresh its Xeon and Atom processor lines with new products manufactured using Intel’s advanced 22nm process node, which offer improved performance per watt characteristics and expanded feature sets that target specific applications.

In total, Intel revealed details of three new low-power, Atom-branded SoCs for the data center, all coming in 2013. Intel talked about updates to the Xeon E3, E5, and E7 product lines, as well. The Atom processor family will see new SoCs based on designs codenamed Briarwood, Avoton, and Rangeley, while the more powerful Xeons will be updated with Haswell, Ivy Bridge EP, and Ivy Bridge EX-based designs.

In the Atom Processor family, Intel announced the S12x9 series of products, which are specifically designed for storage applications. Whereas last year’s S1200 series featured 8 lanes of integrated PCI Express connectivity, the just-announced S12x9 series will feature up to 40 lanes of PCIe 2.0 and improved hardware RAID support.

Coming a little later in the year and targeting micro-servers will be new Atom-branded SoCs, codenamed Avoton. Avoton will be Intel’s true second-gen 64-bit Atom processor based on the Silvermont microarchitecture. It will be manufactured at 22nm and feature an integrated Ethernet controller. According to Intel, Avoton is sampling now to customers, and the first systems are expected to be available in the second half of 2013.

Also due around the same time as Avoton is Rangeley. Like Avoton, Rangeley-based Atom processors will be built using Intel’s 22nm process node, but they will target the network and communications infrastructure market. Rangeley is meant for entry level to mid-range routers, switches, and security appliances. Intel didn’t talk about what exactly differentiates Rangeley from Avoton, but it will most likely be a lower-power derivative.

Coming in the middle of 2012 is a new line-up of Xeon E3 processors built around the upcoming Haswell microarchitecture. In addition to next-gen CPU cores, the new Xeon E3s will leverage the increased graphics performance of Haswell to improve performance in multimedia-related workloads, like HD video transcodes. Of course, Haswell-based Xeon E3 processors will also offer improved performance per watt over existing Sandy- and Ivy Bridge-based designs, due to other architectural enhancements. As we’ve mentioned many times in the past, Haswell will be manufactured using Intel advanced 22nm processed node, and Intel will offer Xeon E3 processors with TDPs as low as 13 watts, which is approximately 25% lower than the prior generation. Current Xeon E3s can be had with TDPs as low as 17 watts.

Also coming later in the year will be new Intel Xeon E5 processors based on the Ivy Bridge EP architectures. Short of announcing that the new Xeon E5 processors will be manufactured at 22nm and that they will offer higher performance per watt than existing designs, Intel didn’t announce any new official details other than to say they will be available in Q3.

After the Xeon E5s will come new Xeon E7 series of processors based on the Ivy Bridge EX architecture. In addition to supporting up to 1.5TB of memory per processor, for up to 12TB of total system memory in an 8-socket server, Ivy Bridge EX-based Xeon E7 processors will feature some new technologies—dubbed Run Sure--designed to enhance stability and reliability and ensure maximum uptime.

Next-gen Xeon E7 processors are meant for mission critical workloads that require very high performance and memory capacity. They support 3x the memory of current designs, and their new Run Sure Resilient System and Memory Technologies are designed to ensure data integrity and enable systems to keep running reliably over extended periods.

Intel also discussed new server- and rack-level advances designed to increase server density and allow for easier upgrades, servicing, and component replacements. The goal of Intel’s future Rack Scale architecture is to allow for more physical disaggregation between compute and storage components to separate traditional computing elements into different pieces, each with their own designated area, which can be individually serviced or upgraded.

Intel wants the rack to be thought of as a type of chassis, with shared cooling and power resources. If a user wants to upgrade only the processors or storage subsystem, they can, without altering any other parts of the system. To bring its future Rack Scale architecture to fruition, Intel is working on improved silicon photonics technologies and enhanced networking and interconnects to speed the compute and network fabric and allow for more modularity. Intel is also working with end users, OEMs, and ISVs, to develop a reference architecture moving forward. Availability is tentatively scheduled for some time in 2014.

More details and information from the IDF Beijing event are in the full press release, posted below. 

Transforming Experiences, from Devices to Datacenters

BEIJING, April 10, 2013 -- During her keynote at the Intel Developer Forum today in Beijing, Diane Bryant, senior vice president and general manager of Intel’s Datacenter and Connected Systems Group, discussed how her company is helping users harness powerful new capabilities that will improve the lives of people by building smarter cities, healthier communities and thriving businesses.

Bryant unveiled details of upcoming technologies and products that show how Intel aims to transform the server, networking and storage capabilities of the datacenter. By addressing the full spectrum of workload demands and providing new levels of application optimized solutions for enterprise IT, technical computing and cloud service providers, unprecedented experiences can be delivered.

Big Data
According to the Cisco Global Cloud Index, the annual global datacenter traffic will reach 6.6 zettabytes by the end of 2016, and global IP traffic will reach 554 exabytes per month. Putting this number in perspective, experts believe mankind has created 5 exabytes of information since the dawn of civilization until 2003.

Intel is at the intersection of the forces driving the explosion of data, such as the increase of mobile devices generating Web-scale data, the growth of high-performance computation and a growing range of sensors and embedded devices that collect data from automobiles, digital signs and more. To help organizations draw new insights from data, Intel recently announced its Intel Distribution for Apache Hadoop* software that delivers optimizations to performance and security, to help more organizations and people take advantage of the vast amounts of data being generated. Intel’s Hadoop efforts originated in China, and has been successfully deployed in smart transportation and telecommunications, among other industries.

  • Improving Safety, Reducing Congestion: Bocom, a leading supplier of traffic management solutions, is collaborating with Intel to transform its end-to-end solution from point video capture to a big data analytics solution. Using Intel Xeon, Bocom can extract data from video and send that information to an Intel-based Hadoop cluster for distributed storage and analytics. Individuals can use this information to streamline their traffic plans, while urban planners can prioritize capital investments and better allocate public safety resources.
  • Real-Time Call Data: With China’s huge population, and the high rate of calls and SMS messages, China Mobile was challenged with offering accurate, timely billing and usage information to subscribers. Using Intel Distribution for Hadoop, China Mobile was able to ensure quality updates and optimal performance. The result is a system that delivers inquiry results 30 times faster and with a greater ability to scale capacity for future growth. The data stored in the Hadoop cluster can also be used for other analytical needs such as personalized promotions and better network usage modeling to discover and fix bottlenecks.

World’s Broadest Datacenter Portfolio
Intel has a long history of delivering industry leading silicon technology optimized for improved performance, power, I/O, security and reliability, availability and serviceability (RAS) features. Combining these powerful technologies enables Intel to meet the diverse needs of data center applications, and when matched with Intel’s industry leading manufacturing, integrate billions of transistors at low power levels. To improve the economics of the data center infrastructure and meet the demands of increasingly diversified applications in 2013, the company will refresh Intel Xeon and Intel Atom processor product lines with new generations of 22nm manufacturing technology-based products. On top of Intel’s most extensive data center portfolio refresh in company’s history, over the coming months Intel will begin production of the new Intel Atom and Intel Xeon processor E3, E5 and E7 families, featuring improved performance per watt and expanded feature set.

Intel Atom SoCs for the Datacenter
In December 2012, Intel launched the Intel Atom processor S1200 product family, the world’s first 64-bit SoC for servers that ranges from 1.6 to 2.0 GHz, and with a thermal design power (TDP) from 6.1 to 8.5 watts. Today, Intel revealed details of three new low-power SoCs for the data center, all coming in 2013.

  • Intel Atom Processor S12x9 product family for Storage. Intel today announced the availability of the low-power Intel Atom processor S12x9 family. Customized for storage deployments, this SoC shares several features with the Intel Atom S1200 processor product family, but contains technologies specifically geared for storage devices.
    • With up to 40 lanes of integrated PCIe* 2.0, or physical paths between I/O and the processor, the capacity demands of multiple devices can be handled more efficiently. Of the 40 lanes of PCIe* 2.0, there are 24 Root Port lanes and 16 Non Transparent Bridge lanes, for failover support.
    • Intel provides hardware RAID storage acceleration so that the computationally intensive RAID function is offloaded in hardware, thus freeing up the SoC to execute other software applications.
    • PCIe Non Transparent Bridge (NTB): NTB provides failover support
    • With Asynchronous DRAM Self-Refresh (ADR), the Intel Atom S12x9 family can protect critical DRAM data in the event of a power interruption.
    • Native Dual-Casting can allow data to be read from a source and delivered to two memory locations simultaneously, which can increase RAID-5/6 bandwidth by as much as 20 percent on a 16+2 RAID 6 system, as compared to system bandwidth without the Dual Cast feature
    • Today, several OEMs are supporting the Intel Atom S12x9 family, including MacroSAN, Accusys, Qsan and Qnap.
  • Avoton. In the second half of 2013, Intel will push the envelope in datacenter efficiency, and deliver the second generation of 64-bit Intel Atom processor for microservers, codenamed “Avoton.” Built on Intel’s leading 22nm process technology and new microarchitecture "Silvermont," Avoton will feature an integrated Ethernet controller and expected to deliver significant improvements in performance-per-watt. Avoton is now being sampled to customers and the first systems are expected to be available in the second half of 2013.
  • Rangeley. Intel will expand its presence in the network and communications infrastructure market by delivering an Intel Atom processor based SoC codenamed “Rangeley,” also built on the 22nm process technology. Rangeley aims to provide an energy-efficient mechanism for processing communication workloads and is targeted for entry level to mid-range routers, switches and security appliances. Rangeley is targeted to be available in second half of 2013.

Intel Xeon processor E3 Family
This year, Intel will introduce the new Intel Xeon processor E3 1200 v3 product family, based on Haswell architecture. To continue to improve performance for video analytic workloads, the Intel Xeon E3 1200 v3 product family will support improved transcode performance. The new Linux-based media SDK provides developers with a standard interface for video processing, simplifies development and reduces the complexities of accessing hardware acceleration. The SDK also maximizes simultaneous use of CPU and Intel HD graphics capabilities for server-based video streaming, which delivers more1 concurrent HD transcodes at a significantly lower total cost of ownership.

Intel also continues to lower the power levels on the Intel Xeon processor E3 family; the lowest TDP will be 13 watts, approximately up to 25 percent lower1 than the prior generation. The improvement from eight transcode to 10 transcode with Haswell’s graphics capabilities also results in up to 25 percent improvement1 in transcode performance per watt for hardware accelerated media performance.

Intel Xeon processor E5 Family
Intel’s next-generation Intel Xeon processor E5 family will be based on the 22nm manufacturing process, and will be available in the third quarter of this year. These processors will also continue to deliver exceptional energy efficiency by supporting Intel Node Manager and Intel Data Center Manager Software. Security will also be improved with Intel Secure Key and Intel OS Guard which provide additional hardware-enhanced security and enhanced Intel AES New Instructions (Intel AES-NI.) Intel OS Guard, the next generation of Intel Execute Disable Bit, protects against privilege attacks by preventing malicious code from executing out of application memory space, in addition to data memory.

Intel Xeon Processor E7 Family: Unlocking Intelligence
Beyond software, robust hardware technology is required to generate the computing power to analyze massive data sets. To support in-memory analytics and rapidly respond to scaling data sets, Intel is on-track for production availability of the next-generation Intel Xeon processor E7 family in the fourth quarter of 2013. Featuring triple the memory capacity – up to 12 Terabytes (TB) in an eight-socket node -- this processor is ideal for data-demanding, transaction-intensive workloads such as in-memory databases and real-time business analytics.

  • With the Intel Xeon processor E7 family, Intel is also announcing Intel Run Sure Technology which will deliver greater system reliability and increased data integrity while minimizing the downtime for businesses running mission-critical workloads. These RAS features will be available with the next-generation Intel Xeon processor E7 family, and will be comprised of Resilient System Technologies, Resilient Memory Technologies.
  • Resilient System Technologies includes standardized technologies integrating processor, firmware and software layers, including the OS, hypervisors and databases to allow the system to recover from previously fatal errors.
  • Resilient Memory Technologies includes features to help ensure data integrity and enable systems to keep running reliably over a longer period of time, reducing the need for immediate service calls.

Reimagining the Datacenter
Traditionally, “balanced systems” such as rack servers, blade servers or micro servers have to be refreshed to maximize the performance of select subsystems such as CPU performance, memory, storage or the network. Today, with the help of Intel, hyperscale customers are leading a transformation of these “balanced” platforms toward rack scale architecture solutions that separate, and group server, storage and network systems, making them more modular and efficient. This transformation starts with sharing power and thermal components, and improving rack management to reduce operating costs, and will evolve to include high-bandwidth fabric interconnects such as Intel Silicon Photonics technology to enable complete disaggregation of racks to drive optimal flexibility for large scale data center deployments. Intel sees the evolution of rack design happening in three phases:

  • Physical Aggregation. All non-critical sheet metal removed and key components such as power supplies and fans taken out of individual servers and consolidated at the rack level. Savings are expected due to higher levels of efficiency and lower costs by reducing the number of fans and power supplies.
  • Fabric Integration and Storage Virtualization. Disaggregate and separate out the storage from compute systems with direct attached storage, and achieve higher utilization through storage virtualization. The compute and network fabric is the key technology that is enabling disaggregation of storage without impact to performance. Intel Silicon Photonics interconnects will enable higher speed connections between various computing resources within the rack, thus enabling the eventual disaggregation of server, memory, network and storage within the rack.
  • Future. Ultimately, the industry will move to subsystem disaggregation where processing, memory and I/O will be completely separated into modular subsystems, making it possible to easily upgrade these subsystems rather than doing a complete system upgrade.

Benefits of rack scale architecture include increased flexibility, higher density and higher utilization leading to a lower total cost of ownership. Based on the needs of cloud service providers and large hyper-scale data centers, Intel is developing a reference design that utilizes Intel technologies and allows a range of solutions for OEM providers to develop and deliver racks. Intel rack scale architecture will include a suite of innovative technologies such as: Intel’s leading Xeon and Intel Atom SoCs for servers, storage, and networking; Intel Ethernet switch silicon for distributed input/output; and Intel’s new photonic architecture, based on high- bandwidth, Intel Silicon Photonics Technology. Silicon Photonics Technology will enable fewer cables, increased bandwidth, farther reach and extreme power efficiency compared to todays copper-based interconnects. Intel demonstrated a mechanical prototype of this new rack architecture earlier this year and will publish a complete reference architecture optimized for deployment as a full rack to make it easy for system builders and customers to adopt.

One implementation of Intel’s rack scale reference architecture is already taking place in China, as Alibaba, Baidu, Tencent and China Telecom are collaborating with Intel on Project Scorpio, an initiative that will deliver a physical aggregated rack consisting of the fan and power supplies in six zones within the rack, with the goal of demonstrating TCO savings.

Intel Cloud Innovation Center in Beijing, China
The Intel Cloud Innovation Center is a large scale datacenter based in China hosting more than 100 of the latest Intel Xeon E5 and E7-based servers using Intel 10GbE networking, Intel SSDs and Intel Xeon E5-based storage. It’s designed to speed solutions innovation for cloud computing. The Center is available starting today for customers and ISVs partners to use for proof of concepts, software development, and solutions evaluation. We are working with leading China ISVs to put together the cutting edge cloud solution such as big data analytic solutions.