Intel Sets Chipmaking Milestone With First High NA EUV Tool For Next-Gen Chips

Intel's foundry arm says it has crossed a major lithography milestone: it has announced successful acceptance testing of ASML's TWINSCAN EXE:5200B High Numerical Aperture (High-NA) EUV scanner, one of the most advanced chipmaking tools currently in existence anywhere. It's the first time the higher-throughput version of ASML's High-NA platform has cleared this bar, and Intel is keen to point out what this indicates about its ambitions as a foundry player.

The EXE:5200B is the follow-on to ASML's earlier EXE:5000 High-NA system, which Intel acquired in 2023 for R&D work in Oregon. The new tool keeps the same 0.55 NA optics, which are critical for printing much smaller features with fewer multi-patterning steps. However, it bumps throughput to a quoted 175 wafers per hour while tightening overlay accuracy to 0.7 nanometers. That's a lot of numbers, but it's important, because High-NA EUV only becomes commercially interesting if it can escape the "science project" phase and survive the brutal economics of high-volume manufacturing.

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Top: an ASML EUV machine. Above: Inside one of said machines. Images: ASML

Intel and ASML say that this acceptance milestone demonstrates that High-NA EUV isn't just sharper, but faster, more stable, and more predictable. Improvements include a higher-power EUV light source, a redesigned wafer stocker for better thermal and process stability, and tighter stage and alignment control—all dull-sounding details that nevertheless decide whether yields live or die.

Strategically, this is about Intel's 14A process node, expected to enter production in the first half of 2027, and which will likely be the company's first to rely heavily on High-NA EUV. Intel has already said 14A will be more expensive per wafer than 18A, and that's largely because High-NA scanners reportedly cost north of $350 million each. The pitch is that fewer masks, simpler flows, and better performance-per-watt will eventually offset that eye-watering capex, and that's clearly a bet Intel is making more aggressively than its rivals.

Alongside the lithography news, Intel also used the announcement to peer further over the horizon. In joint work with Imec presented at last week's IEDM conference, Intel demonstrated what it claims is the first 300mm fab-compatible integration of key process modules for 2D material transistors. These "2DFETs," based on atom-thin materials like MoS₂ and WSe₂, are widely viewed as potential successors to silicon once conventional scaling finally runs out of road.

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A chart from Imec showing potential paths forward for semiconductor shrinkage.

The technical trick here is less about exotic physics and more about manufacturability. Intel and Imec showed "damascene-style" top contacts formed using a selective oxide etch that preserves fragile 2D channels. This is a crucial step toward making such devices compatible with real production lines rather than lab benches.

Taken together, the message Intel Foundry is pushing is clear: advanced tools, early integration, and lots of ecosystem hand-holding to reduce nasty surprises later. Whether this translates into real foundry momentum remains an open question. Intel's foundry business is still loss-making, external customers are cautious, and execution risk remains high.

Still, getting the world's first High-NA EUV production-class tool over the acceptance line is a major step forward. For Intel, it's another sign that the company's long, expensive manufacturing reboot is making continuous progress, even if the real verdict won't arrive until 14A silicon ships in volume.
Zak Killian

Zak Killian

A 30-year PC building veteran, Zak is a modern-day Renaissance man who may not be an expert on anything, but knows just a little about nearly everything.