AMD Ramps 2nm EPYC Venice CPUs on TSMC as Intel Teases 10A and Beyond

AMD announced it has begun ramping production of its 6th Gen EPYC processors, codenamed Venice, on TSMC's 2-nanometer manufacturing process. Initially being made in Taiwan, AMD says it will later shift some production to the TSMC's expanding Arizona fab site. Meanwhile, Intel CEO Lip-Bu Tan is teasing its own future roadmap that includes its 10A and 7A nodes. Folks, the chip wars are heating up.

Starting with AMD, its next-generation EPYC processors represent the first high-performance computing (HPC) product to enter production on TSMC's 2nm process technology, which AMD describes as a key milestone in the execution of its data center roadmap.

"Ramping ‘Venice’ on TSMC 2nm process technology marks an important step forward in accelerating the next generation of AI infrastructure," said Dr. Lisa Su, chair and CEO, AMD. "As AI and agentic workloads scale rapidly, customers need platforms that can move from innovation to production faster. Our deep partnership with TSMC is helping AMD bring leadership compute technologies to market with the speed and scale required to meet this moment."

Indeed, AI is creating immense demand for high-end products in the data center, enabling big tech to rake in record revenue and huge profits. We've seen it across the board, not just at NVIDIA, which played a major role in pushing AI to the forefront. AMD, for example, is coming off a blowout quarter in which it generated $10.25 billion in first quarter revenue, for a 38% year-over-year gain, while Intel recently reported $13.6 billion in Q1 revenue for a more modest 7% year-over-year gain.

This has also intensified competition in the high-margin data center sector. It's worth noting that AMD's EPYC server revenue share recently hit a record 46.2% share, according to figures shared by Mercury Research. That obviously doesn't take into account Venice, which has yet to ship, and it will be interesting to see how the next round shapes out.

AMD's roadmap is also a big deal for TSMC.

"We are pleased to see AMD continue to make strong progress with its next-generation EPYC processor on our advanced 2nm process technology," said Dr. C.C. Wei, Chairman and CEO, TSMC. "Our close collaboration with AMD reflects the importance of pairing leadership process technology with advanced design innovation to enable the next era of high-performance and AI computing."

AMD's 6th Gen EPYC processors will debut on the company's Zen 6 architecture, the same that will underpin its next-generation Ryzen 'Olympic Ridge' chips. Venice will also introduce a new SP7 socket and Zen 6 pack up to 256 Zen 6 and Zen 6c cores, along with lots of cache and up to 1.6 TB/s of memory bandwidth.

What about Intel? It will eventually counter Venice with its Xeon 7 Diamond Rapids CPUs built on its 18A node, though Tan already has his sights further down the roadmap. Speaking at J.P. Morgan's 54th Annual Global Technology, Media, and Communications Conference, Tan briefly mentioned what lies ahead when asked for a progress update on 18A and 14A.

"Right now, it's ahead of schedule compared to end of the year target. And then 14A, we are engaging with customers with real engagement... It's not going to be overnight. But good news, 14A, my risk production is 2028 and volume production in 2029 is about the same time as A14 for TSMC," Tan said.

He also said he's "starting to look at the 10A, 7A, the roadmap," noting that customers are interested in more than the just the current node or what's right around the corner. "They're looking for the road map for the future. So we want to build a long-term business," Tan said.

Buckle up because it's shaping up to be a wild ride for the next several years.