Microsoft Details HoloLens 24-Core Holographic Processing Unit
The HPU is a co-processor built on a 28-nanometer manufacturing process by TSMC. It has two dozen Tensilica-brand digital signaling processing (DSP) cores with custom Tensilica Instruction Extension (TIE) instructions that allow new instructions to be added directly to the instruction set architecture (ISA). Each of those 24 DSP cores handles a specific task.
There are around 65 million logic gates in the HPU. It also boasts 8MB of SRAM along with a layer of 1GB of low-power DDR3 RAM, all stuffed into a 12mm x 12mm BGA packages with a 0.4mm pitch. The HPU is capable of performing about 1 trillion calculations per second and processes all of the environment sensing and various input and output for augmented reality eyeglasses.
This isn't a power hungry chip—the HPU sips on less than 10W of power, which is less than the host System-on-Chip (SoC), a 14-nanometer Intel Atom x86 Cherry Trail part with 1GB of its own RAM. The SoC runs Windows 10 and apps, and processes data that's sent to it from the HPU. By going this route, it limits the amount of processing work that has be done by the Atom chip.
Intel added 10 custom instructions to the aforementioned Tensilica DSPs, all of which are intended to speed things up for real-time AR effects. With all these parts working together, HoloLens can accelerate algorithms up to 200 times faster than if it relied on a pure software solution.
All of this adds up to what's currently a $3,000 headset primarily intended for developers and business users.