Intel might not be the only x86 chip maker gearing up to launch a heterogeneous processor line, AMD could be working towards a hybrid design as well. That's according the latest rumor, anyway, which claims Zen 5 will pair high performance cores with presumably more power efficient cores, the same as Intel's upcoming
Alder Lake chips will do.
The inevitable comparison is always to
Arm's big.LITTLE design philosophy that has worked so well in the mobile space. It's a a completely different kind of architecture than what Intel has in store with Alder Lake, and what AMD is rumored to be cooking up with Zen 5. But the underlying concept is similar—let the bigger iron handle the more CPU intensive chores, and relegate easier tasks to the lower power cores.
How will it work out on the desktop, where battery life typically does not come into play? That remains to be seen, but we will begin to get some answers later this year when Alder Lake arrives. It's expected that
Zen 4 will debut shortly after, though that is going to be a traditional x86 design (read: not heterogeneous), with an expected IPC (instructions per clock) lift and support for features like DDR5 memory and PCI Express 5.0.
Looking further down the line, however, Venomancer Marvin at
MoePC has dished up a fresh rumor saying AMD's future APUs based on
Zen 5, codenamed Strix Point, will "feature a big.LITTLE architecture on 3nm." That architecture is specific to Arm, but what he means is, Zen 5 will introduce a hybrid design, just as Intel is doing with Alder Lake.
According to Marvin, this represents the "next major change" in Zen, with
Zen 5 being a "huge microarchitecture revamp." And indeed it would be, if Zen 5 does in fact go the hybrid route. He also mentions it will comprise AMD's Ryzen 8000 series, though if we are talking about APUs, then technically they would be Ryzen 8000G parts (assuming "8000" ends up being the correct designation).
We already know Zen 4 will be built on a 5nm node, because AMD has shared as much on its roadmap. As for the
shift to 3nm, Marvin says TSMC will being trial production this year, with the first batch of 3nm silicon going to Apple. Strix Point will not see the light of day until 2024, according to Marvin, who notes that specifications could change between now and then.
The rumor raises more questions than it answers. One of the bigger ones is what kind of cores will AMD supposedly leverage for its hybrid design? How will they communicate, and what kind of core and thread counts are in store? Apparently we have three years to ponder those questions, and more.