Items tagged with SSE5

by Joel Hruska - Thu, Jul 01, 2010

Intel's Sandy Bridge, AVX Extensions On Track For Q4 2010

For those of you who can't wait to get your hands on the latest and greatest, news today should have you making out a Christmas list. Intel has confirmed that the next-generation Nehalem processor (codenamed Sandy Bridge) is on track for volume shipment in 2010, which means we'll probably see at least a few SKUs launching before the end of the year. Sandy Bridge is a 'tock' in Intel's tick-tock model, meaning it's a new architecture delivered on an existing process technology. Many of the processor's characteristics will be familiar, such as the 256K of L2 cache and the 8MB L3, but the chip has a few surprises up its sleeve. The GPU core will be integrated into the CPU die, unlike the 32nm /... Read more...

by Chad Weirick - Wed, Sep 19, 2007

Intel Won't Support SSE5: Nobody Is Surprised

AMD made an announcement a few weeks ago that made many in the industry scratch their heads: AMD (not Intel) will release SSE5. This was quite confusing since AMD is known for their own set of instructions, 3D Now!, which the company has quietly dropped development of in favor or following Intel's lead with SSE instruction sets.One of the major reasons SSE was able to supplant 3D Now! is that Intel has one of the best software support divisions of any hardware company on the planet. While both AMD and Intel were able to release detailed documents on how developers could utilize their instruction sets, Intel went a step further and added automatic SSE optimizations to the compilers and libraries... Read more...

by Marco Chiappetta - Thu, Aug 30, 2007

AMD Announces SSE5 Instruction Set

AMD to Boost Performance for Everyday Compute-Intense Multimedia, Security and High Performance Computing Applications through New Extensions to x86 Instruction Set New instruction set “SSE5” continues tradition of AMD x86 innovation, including 3DNow!, AMD x86-64 architecture, AMD Virtualization and Light-Weight Profiling specification SUNNYVALE, Calif -- August 30, 2007 --AMD today announced further plans to innovate the x86 architecture by introducing SSE5, a new extension of the x86 instruction set that is designed to allow software developers to simplify code and achieve greater efficiency for the most performance-hungry applications.... Read more...