Items tagged with Power7

Last month, we discussed the split between IBM and the NCSA (National Center for Supercomputing Applications) over the highly ambitious 'Blue Waters' project. Blue Waters was the name of a planned supercomputer that would've been entirely water-cooled and included as many as 524,288 CPU cores. The disintegration of the deal came as some surprise, given the amount of work that'd already been done on the project. New details have come to light on why the University of Illinois and IBM ultimately parted ways over the project. One of the major issues appear to have been the clock speeds of the CPUs. The project selected IBM in 2007 as the supercomputer vendor for the Blue Waters project based on... Read more...
Four years ago almost to the day, the National Science Board handed the National science Foundation a mandate to build the most powerful petaflop-class supercomputer in the world. The NSF announced in turn that the system would be based on IBM's Power7 processor technology. One of the features that won IBM the contract was the fact that the cluster doesn't require message passing and could theoretically be programmed as a single system. As of today, Blue Waters is officially canceled. The news comes less than a month after IBM announced it would begin commercial shipments of the individual nodes that were originally supposed to make up the building blocks of the Blue Waters system. The MCM modules... Read more...
The x86 architecture has increasingly dominated the server market over the past decade but there's still a market for mainframe, big-iron servers. At present, Intel has challenged old guards Sun and IBM with a mixture of Nehalem-based Xeons and Itanium processors with the octal-core Nehalem-EX waiting in the wings. IBM isn't waiting for Nehalem-EX or Intel's new Itanium processor to hit the market before taking action of its own; Big Blue launched its POWER7 architecture on Monday. At 567mm2 and 32MB of on-die L3 cache, the new CPU is something of a beast. Each POWER7 chip is divided into eight cores each with its own L2 cache. Each core is capable of handling four threads for a total of 32 threads... Read more...