Items tagged with E5
Earlier this year we detailed the launch of new 15-core Ivy Bridge-based server processors from Intel, as part of the Xeon E7 refresh cycle. Today, Intel is pushing the Xeon E5 family forward -- except in this case, the new Xeon E5 v3 chips are leaping to higher core counts, the more advanced Haswell-EP architecture, and DDR4. The result? The highest-performing Intel server we've seen to date. Collectively, this is a huge leap forward for the entire Xeon E5 series. The Xeon E5 V2 chips, which were based on Ivy Bridge, topped out at 12 cores per socket. The new Xeon E5 v3 cores, in contrast, are going to push as high as 18 cores per socket -- a 50% improvement... Intel 18-Core Haswell-EP Xeon...
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Earlier this year we detailed the launch of new 15-core Ivy Bridge-based server processors from Intel, as part of the Xeon E7 refresh cycle. Today, Intel is pushing the Xeon E5 family forward -- except in this case, the new Xeon E5 v3 chips are leaping to higher core counts, the more advanced Haswell-EP architecture, and DDR4. The result? The highest-performing Intel server we've seen to date. First, the chips and platform: Collectively, this is a huge leap forward for the entire Xeon E5 series. The Xeon E5 v2 chips, which were based on Ivy Bridge, topped out at 12 cores per socket. The new Xeon E5 v3 cores, in contrast, are going to push as high as 18 cores per socket -- a 50% improvement. The...
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At the International Supercomputing Conference today, Intel announced that Knights corner, the company's first commercial Many Integrated Core (MIC) product will ship commercially in 2012. The Descendent of the Processor Formerly Known as Larrabee also gets a new brand name -- Xeon Phi. The idea behind Intel's new push is that the highly efficient Xeon E5 architecture (eight-core Sandy Bridge on 32nm) fuels the basic x86 cluster, while the Many Integrated Core CPUs that grew out of the failed Larrabee GPU offer unparalleled performance scaling and break new ground. Sounds interesting enough doesn't it? Intel Announces MIC Xeon Phi, Aims For Exascale Computing...
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At the International Supercomputing Conference today, Intel announced that Knights corner, the company's first commercial Many Integrated Core (MIC) product will ship commercially in 2012. The Descendent of the processor formerly known as Larrabee also gets a new brand name -- Xeon Phi. The idea behind Intel's new push is that the highly efficient Xeon E5 architecture (eight-core Sandy Bridge on 32nm) fuels the basic x86 cluster, while the Many Integrated Core CPUs that grew out of the failed Larrabee GPU offer unparalleled performance scaling and break new ground. The challenges Intel is trying to surmount are considerable. We've successfully pushed from teraflops to petaflops,...
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AMD's Financial Analyst Day last week made it clear that while the company is primarily focused on consumer products and SoC design, it still wants to be a player in the server market. The various presentations were a bit unclear as to how AMD thought it would make that happen -- there was plenty of mention of "the cloud", but few details on how AMD could position its Bulldozer / Interlagos architecture to make a play in this space. Extensive testing over at Anandtech has shed some light on the situation. The new article is a follow-up to the original story; combined, they offer a panoramic view of Sunnyvale's position in a wide range of HPC, virtualization, rendering, SQL, and SAP benchmarks....
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AMD made an announcement a few weeks ago that made many in the industry scratch their heads: AMD (not Intel) will release SSE5. This was quite confusing since AMD is known for their own set of instructions, 3D Now!, which the company has quietly dropped development of in favor or following Intel's lead with SSE instruction sets.One of the major reasons SSE was able to supplant 3D Now! is that Intel has one of the best software support divisions of any hardware company on the planet. While both AMD and Intel were able to release detailed documents on how developers could utilize their instruction sets, Intel went a step further and added automatic SSE optimizations to the compilers and libraries...
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AMD to Boost Performance for Everyday Compute-Intense Multimedia, Security and High Performance Computing Applications through New Extensions to x86 Instruction Set New instruction set “SSE5” continues tradition of AMD x86 innovation, including 3DNow!, AMD x86-64 architecture, AMD Virtualization and Light-Weight Profiling specification SUNNYVALE, Calif -- August 30, 2007 --AMD today announced further plans to innovate the x86 architecture by introducing SSE5, a new extension of the x86 instruction set that is designed to allow software developers to simplify code and achieve greater efficiency for the most performance-hungry applications....
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The AOA Forums have uncovered what is supposedly a new motherboard from Abit that is using an nForce5Z chipset. Clad in an unusual purple color with some "ahem" interesting graphics, one begins to wonder whether this is a real board or rather a clever trap to find the source of information leaks. Afterall, a purple motherboard with flowers is more than unique enough to easily stand out and track. However, should the board be real you can expect support for DDR2-1066, Azalia HD audio, SATA II RAID, and dual Gigabit LAN. Time will tell whether we're seeing a real motherboard or a really clever trap I suppose. Abit "The DAN 5up4too1"...
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