Alleged Intel Ice Lake-SP 10nm Xeon CPU Wielding 24 Cores And 48 Threads Leaks
As far as we know, Intel is still planning to launch 10th generation 10-nanometer Ice Lake-SP Xeon processors for the server market this year, and perhaps even sometime this month, if it sticks with a previously rumored 1H20 time frame. Ahead of the launch, we have another set of Ice Lake-SP leaks to digest.
This latest round of leaks focuses on an Ice Lake-SP model with 24 cores and 48 threads. As we have written about before, Ice Lake-SP is rumored to ship with up to 38 cores and 72 threads (per socket), with support for 64 PCI Express 4.0 lanes. 8-channel DDR4-3200 memory (16 DIMMs per socket), and Intel's second generation Optane DC Persistent memory.
These upcoming chips will be part of Intel's Whitley platform, which will use a Socket P+ design in 2S configurations. This will replace Intel's Skylake-based Purley platform. It is also expected that Ice Lake-SP will be the first high performance 10nm chips from Intel, bound for Xeon workstations (and possibly high-end desktop, or HEDT, systems at some point).
The leak highlights a 24-core/48-thread version with 1.25MB of L2 cache per core. This is a 25 percent increase compared to Skylake-SP, which boasted 1MP of L2 cache per core. It is shown as having a relatively tame 2.2GHz base clock, and a 2.9GHz boost clock, according to a set of Geekbench listings spotted by APISAK.
All three Geekbench runs returned similar scores, and are a little bit higher than a previous Ice Lake-SP leak, which was reported to be a 12-core/24-thread CPU. That was not a definitive determination, though, and that previous leak might have also been indicative of a 24-core/48-thread CPU. Either way, we'd caution against drawing any kind of conclusion from the Geekbench scores.
The same processor also showed up in SiSoftware SANDRA's database. It's a little less detailed, but it shows the same number of cores and threads, as well as the same cache arrangement and clocks.
While not shown is these leaks, Intel is also readying a batch of Cooper Lake-SP processors. These will arrive in conjunction with Intel's 4-socket Cedar Island platform with support for 6-channel DDR4-2933 memory (3TB per socket). However, Cooper Lake-SP will be another iteration of 14nm, bound for high performance scalable Xeon setups.