AMD Ryzen Die Shot, Cache Structure And Architecture Advantages Exposed At ISSCC
The Sunnyvale chip designer brought a bunch of slides to ISSCC (International Solid-State Circuits Conference) earlier this month. Most of the information was kept under wraps, though a Japanese-language website has now leaked several of the slides and information to the web, giving us a better understanding of Ryzen's architectural makeup than what AMD had previously shared.
One of the improvements AMD has been touting with Ryzen is a super smart branch prediction that is intended to eliminate stalls in the pipeline. AMD calls this Neural Net Prediction. What branch prediction does is guess which way an instruction branch will go before it is known for sure. If it guesses correctly (and these are educated guesses, not flips of the coin), then the processor can save time and ultimately performs better. But when it's wrong, that is when things stall while a new instruction is fetched. With Ryzen, there is a large amount of data dedicated to constantly training and retraining AMD's branch predictor so that pipeline stalls happen less often.
"Intel is as small as 89 percent for CPP (Contacted Poly Pitch) with gate spacing and 81 percent for 1 x Metal Pitch showing wire spacing. In other words, the Intel process is more dense. Even for SRAM cell size, Intel is as small as 72 percent. Nevertheless, the cluster size of 4 CPU cores and 8MB L3 cache is as small as 44 mm2 for Intel's 49 mm2. Although there are reasons such as small floating point arithmetic units, it is also implied that AMD has lower design complexity."It cannot be understated that AMD is no longer at an automatic architectural disadvantage compared to Intel due to Intel's advanced process technology. That is something AMD hasn't been able to boast for over a decade.
One advantage of moving towards a more traditional SMT design is that it allowed AMD to build a single larger integer cluster rather than have two separate integer clusters with a single front-end like Bulldozer. This paves the way for higher single-threaded performance—AMD touts a greater than 40 percent instructions per clock (IPC) gain compared to the previous generation.
One other thing that AMD brought up is Precision Boost, which is something that it's talked about before. The goal with Precision boost is to consistently provide higher performance, for the same or lower power than un-optimized silicon. It essentially offers on-the-fly frequency adjustments, with fine grained increments of 25MHz, determined by the processor’s workload and health data at the time. This works in tandem with another technology AMD calls Pure Power, which monitors temperatures, frequencies, and voltage, and adaptively controls each element to optimize performance and power usage.
What all of this translates to in terms of real-world performance remains to be seen. It's been rumored that Ryzen could launch on February 28 during AMD's Capsaicin event at GDC 2017, though we think an early March launch to retail is more likely.