Samsung Starts Volume Production of World’s First 3D Vertical NAND Flash Memory
By using a vertical cell design with 3D Charge Trap Flash (CTF) technology and a “vertical interconnect process technology” that links the cell array, Samsung enabled a single-chip density of 128Gb. In a release, the company described the technology by saying, “To do this, Samsung revamped its CTF architecture, which was first developed in 2006. In Samsung’s CTF-based NAND flash architecture, an electric charge is temporarily placed in a holding chamber of the non-conductive layer of flash that is composed of silicon nitride (SiN), instead of using a floating gate to prevent interference between neighboring cells."
Samsung claims that V-NAND can offer a 2x-10x increase in reliability and double the write performance of the average 10nm floating gate flash memory, and the technology supports stacking as many as 24 layers vertically.