Rambus Looks To Take DDR3 RAM Beyond 3200Mbps

Leave it to Rambus to keep the memory industry from resting on its laurels. Currently, DDR3 has a data rate limit of 3200Mbps, but all that's gearing up to change. Announced today, Rambus has unveiled a set of innovations that can advance computing main memory beyond said limit, and needless to say, these "advancements" are available now for licensing. The collection of improvements promises to let designers achieve higher memory data rates, higher effective throughput, better power efficiency and the increased capacity necessary for future computing applications.

Craig Hampel, Rambus Fellow, gloated quite heavily about the largely secretive announcement: "Product advancements in multi-core computing, virtualization and chip integration put ever-increasing demands on the memory sub-system, a key performance limiter in today’s performance computing systems. This collection of breakthrough innovations from Rambus allows for memory systems that are better suited for the bandwidth and workloads of these throughput-oriented multi-core processors, increasing the design and solution space for future main memory to enable a new generation of computing platforms."

The full list of highlights are below, but we're still left to wonder what this means for the future of memory. Are higher-speed DRAM modules just around the bend? How will they overclock? Will they fix us supper when they're done handling Office save files? The world waits in tense anticipation.

The Rambus key innovations to advance the main memory roadmap include:

  • FlexPhase™ Technology — introduced in the XDR™ memory architecture, can enable higher data rates compared to direct strobing technology used in DDR3;
  • Near Ground Signaling — supports high performance at greatly reduced IO power, allowing operation at 0.5V while still maintaining robust signal integrity;
  • FlexClocking™ Architecture — introduced in Rambus’ Mobile Memory Initiative, reduces clocking power by eliminating the need for a DLL or PLL on the DRAM;
  • Module Threading — increases memory efficiency and reduces DRAM core power, and when combined with Near Ground Signaling and FlexClocking technology, can cut total memory system power by over 40%;
  • Dynamic Point-to-Point (DPP) — provides a path for capacity upgrades without compromising performance through robust point-to-point signaling.

Tags:  memory, Storage, RAM, RAMBUS, DDR3, DRAM