When it comes to the future of processor design, the writing is on the wall: chiplets are here to stay and will drive modular designs from the likes of Intel, AMD, Arm, and others. In fact, those same companies, along with other heavy hitters in the tech industry, are throwing their collective weight behind an industry consortium that will establish an open chiplet ecosystem based on a die-to-die interconnect standard.
This is a huge development, because consumers ultimately win when innovative companies embrace industry standards. Just look at technologies like
USB (driven by USB-IF) and PCI Express (managed by PCI-SIG), or even ATX to some extent, without which consumers would have to wade through an even bigger sea of competing proprietary technologies. Standardizing chiplet interconnects could also allow for faster time to market for customized solutions targeted at data centers and usher in an age of custom chips, potentially leveraging IP and technologies from multiple companies, for numerous different market segments.
As such, a collection of founding companies have established the Universal Chiplet Interconnect Express (UCIe) consortium and accompanying specification to establish a ubiquitous interconnect at the package level. In addition to the aforementioned firms, founding members also include Advanced Semiconductor Engineering (ASE), Meta, Microsoft, Qualcomm, Samsung, and Taiwan Semiconductor Manufacturing Company (TSMC).
"Integrating multiple chiplets in a package to deliver product innovation across market segments is the
future of the semiconductor industry and a pillar of Intel’s IDM 2.0 strategy. Critical to this future is an
open chiplet ecosystem with key industry partners working together under the UCIe Consortium toward
a common goal of transforming the way the industry delivers new products and continues to deliver on
the promise of Moore’s Law," said Sandra Rivera, Executive Vice President, Intel Corporation and GM, Data Center & AI.
In a
separate announcement, Intel's Kurt Lender noted that the feasibility of implementing complex systems on monolithic dies is approaching physical and economic limits. A modular approach based on chiplets is inevitable, and this new consortium should help drive the industry as a whole in the same general direction.
Likewise, AMD shared similar sentiments, and has obviously seen the writing on the wall as well (as evidenced in part by its
transition to 3D V-cache).
"AMD is proud to continue our long history of supporting industry standards that can enable innovative
solutions addressing the evolving needs of our customers. We have been a leader in chiplet technology
and welcome a multi-vendor chiplet ecosystem to enable customizable third-party integration. The UCIe
standard will be a key factor to drive systems innovation leveraging heterogeneous compute engines
and accelerators that will enable the best solutions optimized for performance, cost, and power
efficiency," said
Mark Papermaster, Executive Vice President and Chief Technology Officer, AMD.
There's a
white paper available for anyone that wants to dive into the technical details, which gets into mapping PCIe and CXL protocols natively, as well as things like the different data rates, widths, bump-pitches, and channel reach. But the takeaway for a layperson is that this, in theory, should result in some interesting advancements, lower costs to consumers, faster time to market, and greater flexibility. Or as Intel puts it, "competition will take place on a level playing field," where it's the products themselves that are the differentiators and "not artificially constrained ecosystems or technological incumbency."
It's not clear how long it will take for the
UCIe consortium (PDF) to have a measurable impact on the industry.