The future of computing is in multi-core processors. The bulk of today’s smartphones come with four or more cores, and even our desktop computers usually at least have dual cores, with quad-cores chips being quite prevalent. But with a rise in core counts also comes a need to ensure that communications between these competing resources moves along at a blazing fast speed.
Thankfully, researchers at both NC State University and Intel have come with a way to significantly reduce bottlenecks that clog up the communications link between cores. To do this, the researchers developed what they call a Queue Management Device (QMD). With QMD enabled, core-to-core communication speeds saw a 2x uplift at a minimum in simulations.
Intel Xeon Phi Processor Die
With Intel touting processors like the Xeon Phi, which boasts a whopping 72 cores, such a breakthrough could be a boon for on-chip communications. As core counts increase, the need for a “traffic cop” to handle data being swapped between cores only becomes more important. In today’s processors, software is used to prevent data errors or to prevent cores from overwriting data from complimentary cores. QMD offloads those software routines to dedicated on-chip hardware, which explains the dramatic increase in core communication speeds.
And what was more profound was the fact that there were sometimes far greater than 2x improvements to be had as the core count continued to increase. In simulations with 16 or more cores, QMD allowed the cores to communicate up to 20 times faster than when using software routines.
But we have to remember this these theoretical gains have only been accomplished in software, and that companies like Intel have to actually implement the hardware in future processor designs to realize these improvements in the real world. That could take years, but it’s nice to see that
“We have to improve performance by improving energy efficiency,” said lead author on the story, Yan Solihin. “The only way to do that is to move some software to hardware of NC State University. The challenge is to figure out which software is used frequently enough that we could justify implementing it in hardware. There is a sweet spot.”