HP Uses Pringle Approach To Goose Moore's Law

Hewlett-Packard researchers realized they could pack more transistors on a chip, without shrinking them, simply by moving their connections to a nano-wire grid on top of them and packing more of them in the space they saved.

"For a long time, we in the industry have been obsessed with this idea that higher capacity [chips] and lower cost equals smaller transistors, and we've been investing the bulk of our efforts in this area," says Stanley Williams, senior fellow and director of quantum-science research at HP Labs. The new research, Williams says, "is the first proof that it's possible to dramatically improve integrated circuits without shrinking transistors."
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