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IDF Day 1: Paul Otellini's Keynote
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Date: Sep 18, 2007
Section:Processors
Author: Marco Chiappetta
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Process Technologies

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This year’s Intel Developer Forum began with a brief overview of the event given by Pat Gelsinger, Senior Vice President and General Manager of Intel’s Digital Enterprise Group.  Pat spoke briefly about this year being the 10th Anniversary of IDF and talked about the many speakers and partners that will contribute to the event.

 

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After Mr. Gelsinger was done, he introduced Paul Otellini, Intel’s President.  Paul began with talk of "extremes" and how today’s cutting-edge technology will be tomorrow’s mainstream.  He spoke of advancements in WiMax and how advancements in manufacturing have enabled smaller form factors and improvements in energy efficiency.

 

   

 

Paul also spoke of Intel’s platform technologies and how the company’s focus on producing entire platforms have enabled partners to bring products to maker much faster than before.  He then moved on and began speaking about process technologies and how this area has changed in the last few years.  We’ve already covered some of Intel’s announcements regarding their 45nm manufacturing process – much of what we spoke about in those articles was covered in Mr. Otellini’s keynote.  He spoke of High-K metal gate transistors and how the move to a hafnium-based gate material had enabled huge savings in power consumption through a major decrease in current leakage through the gate.

 

   

 

While covering the products that will be introduced at 45nm, Paul also mentioned that 45nm process technology will finally make it feasible, from a transistor budget standpoint, to introduce graphics processing capability to the CPU architecture.  Of course, Intel is not stopping at 45nm and Paul also spoke of the impending move to 32nm.  While on the topic, Mr. Otellini walked over and picked up a 32nm wafer consisting of a number of processor dies, each made up of approximately 1.9B transistors.  That’s billion with a "B".

 

   

 

After an overview of Intel’s process technologies, Mr. Otellini then moved onto some discussion of Penryn and its up-coming

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Penryn, Nehalem, and More

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In his Penryn update, Otellini mentioned that a quad-core Penryn will consist of approximately 410M transistors and that it will launch on November 12.  He also said that derivatives of Penryn will be just a part of a group of roughly 20 new desktop and enterprise products coming before the end of year, all built using 45nm process technology.  Then in the first quarter of next year, another group of products will arrive for the mobile space.  Otellini went on to also note Intel’s move to produce not only more power-efficient products, but “cleaner and greener" products as well – by removing lead from the manufacturing process and the company’s plans to remove halogen from the process in ’08.


 

   

 

Then Paul moved onto talk of Intel’s next-gen processor architecture dubbed Nehalem. We’ve given you some details regarding Nehalem in the past as well.  It will be available in the second half of next year and is designed to be a module architecture that can have multiple different cache, core, and I/O configurations.  Nehalem will also feature finer-grained clock gating technology for improved efficiency.

According to the keynote, Nehalem will feature 8-cores on a single die and each core can process two threads, for a total of 16 threads per 8-core CPU.  Nehalem processors will be comprised of roughly 731M transistors and feature a number of new technologies.

 

   

 

At this point, Paul brought out Glenn Hinton to speak of the company’s goals with Nehalem.  Glenn said they planned to build the highest performance core yet that’s scalable to any number of different platforms.  He spoke about the processor’s Quick Path Memory controller and Quick Path Interconnect, which are marketing terms for Nehalem’s integrated memory controller and serial interface.  Then Glenn and Paul showed of a full functional machine running XP on Nehalem and also mentioned that this morning Intel booted OSX on early Nehalem samples.

 

   

 

Mr. Otellini then discussed the 45nm fabs Intel has in the works.  The Oregon and Arizona fabs are already on-line; Israel and New Mexico will follow next year.  Each fab cost in excess of $4B dollars.

 

   

 

Then Paul moved on and talked about upcoming advancements in the mobile space.  He mentioned that there are currently 120 WiMax trials already going on around the world, with more to follow.  He also said that Intel was currently developing a new integrated WiFi and WiMax controller codenamed Eccopeak that will debut with the Montevina platform next year. He also mentioned that there would be a 25W version of the Montevina platform available that would enable even smaller form factors.

Otellini then spoke of an upcoming ultra low-power Menlow platform built around the Silverthorn CPU and expressed Intel’s commitment to lower idle power 10-fold with the “Moorsetown” platform.

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Larabee, The Next Extreme

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During the course of the keynote, Mr. Otellini also showed a demo of an overclocked machine that was able to break a number of existing benchmark records, thanks to its cascading vapor phase change cooling system and 5.56GHz clock speed.

 

   

 

Mr. Otellini then moved on and talked about gaming, the X38 chipset, and the future Larabee platform.  He said X38 would be launching on October 10 and features a number of overclocking related features, PCI Express 2.0 support, and will offer a new software based tuning utility.

 

   

 

While he spoke about gaming, Paul mentioned that Intel plans to increase IGP performance 10-fold by 2010 to enable fluid game play on platforms featuring an IGP.  He brought out representatives from Havok (which was recently acquired by Intel) and Pandemic to speak about gaming on Intel’s platforms and to demo an upcoming multi-threaded game named Mercenaries 2.

 

    

 

While on the topic of Larabee, Paul mentioned that the platform would be demoed next year and will feature a many-core CPU with a shared cache.  The Larabee platform is designed for HPC and super computing applications, but as Mr. Otellni mentioned – today’s extremes are tomorrow’s mainstream.

 

   

 

He then moved on to the new form-factors enabled by Intel’s platforms and the increase in popularity in Ultra Mobile (UMPC) and Mobile Internet Devices (MID) and showed off a couple of affordable devices like the Classmate Notebook and Asus EeePC.  He also spoke of Intel’s SOC, or System on a Chip “Canmore” platform which will debut next year.

Paul concluded the keynote with take of power efficiency and the savings offered to large datacenters with current and future platforms.  A representative from the EPA came out and mentioned that 1.5% of all power consumed worldwide is drawn by datacenters, and due to growth in this area that number is expected to double by 2011.  They then showed off an energy efficient rack that consumed 15% less power than the previous generation while offering better performance.  

Wrapping up our day 1 coverage of IDF, it's clear that Intel is not only playing the bigger, faster, more-power game, scaling multi-core processors to new heights, they're also keyed on tempering that with power efficiency and providing more mobility to the masses as well.  

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