AMD Will Push 'Piledriver' Beyond 4GHz Using Resonant Clock Mesh Technology
"We were able to seamlessly integrate the Cyclos IP into our existing clock mesh design process so there was no risk to our development schedule," said Samuel Naffziger, Corporate Fellow at AMD. "Silicon results met our power reduction expectations, we incurred no increase in silicon area, and we were able to use our standard manufacturing process, so the investment and risk in adopting resonant clock mesh technology was well worth it as all of our customers are clamoring for more energy efficient processor designs."
Resonant clock mesh technology will not only lead to higher clocked processors, but also significant power savings. According to Cyclos, the new technology is capable of reducing power consumption by 10 percent or bumping up clockspeeds by 10 percent without altering the TDP. But what exactly is resonant clock mesh technology?
"Cyclos resonant clock mesh technology employs on-chip inductors to create an electric pendulum, or 'tank circuit', formed by the large capacitance of the clock mesh in parallel with the Cyclos inductors," Cyclos explains. "The Cyclos inductors and clock control circuits 'recycle' the clock power instead of dissipating it on every clock cycle like in a clock tree implementation, which results in a reduction in total IC power consumption of up to 10 percent.
Source: design-reuse.com
Cyclos and AMD didn't go into too much detail about Piledriver, though they did say it will consist of a 4GHz+ x86-64 core built on a 32nm CMOS process. For all kinds of geeky details on resonant clock mesh technology, check out this Wiki article posted by Dan Ganousis, vice president of Cyclos Semiconductor.
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Via: Cyclos Semiconductor | News Archive
| Tags:
AMD,
CPU,
processor,
Piledriver,
Cyclos Semiconductor,
Resonant Clock Mesh,
4GHz
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Yup im excited to see what other changes AMD has made to bulldozer in piledriver. Hopefully changes like this will bring AMD somewhat closer to competing effectively in efficiency. |
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They need to drop the nanometer size as well it would make it more heat efficient and even more energy efficient as well as being able to use a larger cooling surface for more consistent and less energy usage on the cooling side as well. |
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What they need to do is drop this silly architecture and bring it on later when it is ready. And keep this design only for servers if they wish. But i doubt they would do that. It seams they don't really care for the enthusiast market. |
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Hey, as long as it works! |
The sooner AMD starts busting Intel's chops in the high-end processor segment the better!|
As someone on digg posed the question, " I wonder if this is AMD hitting their Pentium 4 era..." Oh, that would not be good at all. |
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I think AMd cannot compete with intel on the High-end, but i believe they will be a winner with Trinity as well as in the mainstream. after-all there is a larger market with mainstream. I just hope they nail it this time.. Llano was successful IMO, too bad only a few people notice and people still go with intel.. sad.. |
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I agree with you there, NSy. Llano, especially low power stuff was nice in the mobile space. We shall see. What we've seen of Trinity at CES this year, looked pretty good. |
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Clock mesh sounds interesting; if done right then hopefully AMD should be able to come out with a processor that can finally match Intel's, potentially even top it. I agree with rapid in that they need to minimize the die size. While this does lead to a beneficial performance increase, they'll never get anywhere unless they manage to shrink the die while keeping the same surface size; both would lead to tremendous increases in performance and overclocking potential. Of course, we won't actually get to see how it performs until it reaches our hands; and who knows what date that will be.
I doubt that. The Pentium 4 was actually one of the more respectable processors of the time; it was actually the attempts to try to get every bit of juice out of that architecture (x64, Dual Core) that caused it to earn the name it has today. I have to blame the fact that the architecture simply wasn't designed to be scalable; I mean sure, it works in a single core environment but add two cores and it becomes a whole other problem. AMD hasn't reached the Pentium 4 era yet but they're awfully close. |
Dave_HH:|
A tank circuit will only be resonant at one frequency. If you depend upon this technology, it is only going to work as intended exactly at the intended clock frequency. To those of us who like to find the fastest possible clock frequency one can get away with before something either becomes unstable or melts down, this approach is going to be a real drag. It will fail entirely at the slightest increase in clock or it will dramatically increase the rate at which higher clock frequencies increase power dissipation, unless they somehow make the tank circuit tunable, which seems highly unlikely. |
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