|Introduction to IvyTown|
|For months, there have been rumors circulating of a new Intel 15-core CPU, with a particular focus on Big Data analytics, multi-socket systems, and the enterprise market. Well, this past January, we took a trip to Intel's SAP research lab to see the new processors and the rather substantial update coming down the pipe.
Unlike Intel's mainstream and basic server products, the truly Big Iron hardware updates on a significantly slower cadence. Haswell chips launched eight months ago for desktop and the Xeon E5 v2 family, based on Ivy Bridge, has been available for months -- but the Xeon E7 processors Intel is replacing today are still based on the old Westmere core, which first debuted in consumer products back in 2010.
The new Xeon E7 v2 processors include a suite of new features, as shown below:
The interconnect changes deserve some explaining. Westmere-EX, the old 32nm chip, still had separate I/O hubs on the motherboard, and a QPI port dedicated to each of them. The new Xeon E7 v2 moves those hubs on-die, which means the system's remaining three QPI links are still providing a significant bandwidth boost -- up to 8GT/s, from 6.4GT/s. The old Westmere-EX platforms had up to 72 lanes of PCIe 2.0 connectivity provided per socket; the new E7 v2 cores offer 32 PCIe 3.0 lanes per socket.
The entire structure of the last-level cache has been reworked, with a comprehensive ring bus incorporated across all 15 cores. Intel implemented the 37.5MB of L3 in 15 slices, which allows each core a dedicated interface to the L3. Intel claims up to 450GB/s of bandwidth per socket counting both the quad-channel memory controllers and the L3 cache. Total access latency is just 15.5ns -- faster than AMD's L2 cache on modern processors. Thanks to a new buffered memory protocol, dubbed Jordan Creek, Intel can now support three DIMMs per memory channel and support for up to DDR3-1600 as opposed to Westmere's relatively paltry DDR3-1066.
|Intel's performance and efficiency claims for the new server family are impressive, even given the length of time since the last E7 products launched.
The new chips are substantially faster than older products, for several reasons. The Ivy Bridge family doubled the number of GFLOPS/cycle that the CPU was capable of performing, Ivy Bridge hits modestly higher clock speeds than the older Westmere parts, the chips themselves have 50% more cores, and Intel has improved performance incrementally between Westmere and SNB, and then between SNB and IVB.
Add all those things together, and the end result is a substantially faster chip. One of the goals for the new E7 v2 family, however, was to create cores that could scale to hit higher performance targets but would also be more power efficient than previous designs.
In many ways, these new cores are a response to the rapidly changing market conditions of the current PC industry. These new enterprise servers are designed for the kind of Big Iron deployments where performance trumps most other considerations, but they address power efficiency and efficient scaling both per-socket and across an entire server node. Intel doesn't have many competitors left in the Big Iron space, but it clearly views these products as essential to its long-term business health.
The significant improvements to the new Xeons will see their first serious challenge when IBM debuts its next-generation POWER8 architecture -- we'll be able to tell then if Intel made the right bets for this market space.