IBM, GlobalFoundries Flipflop On 20nm Production Technology
As semiconductor manufacturing has moved to ever-smaller process nodes, the difficulty of managing each transition has increased markedly. As a result, the major foundries have adopted divers methods of improving product yields and minimizing gate leakage. Examples of these methods include AMD's adoption of immersion lithography at 45nm, Intel's simultaneous decision to use double-patterning at 45nm but not introduce immersion lithography until 32nm, and TSMC's choice to extend traditional Poly/SiON technology to the 28nm node. All of these decisions have carried a degree of risk—Robert Palmer, current member of AMD's Board of Directors and former Digital CEO purportedly remarked that "Designing microprocessors is like playing Russian roulette. You put a gun to your head, pull the trigger, and find out four years later if you blew your brains out."
He That Is First Shall Later Be Last
The major semiconductor manufacturing question of the last year has been whether gate-first or gate-last technology offered the smoothest transition to 28nm and the nodes below it. According to an IMEC paper available here, "The terminology 'first' and 'last' refers to whether the metal electrode is deposited before or after the high temperature activation anneal(s) of the flow."
Up until now, Intel and TSMC were the major proponents of gate-last technology based on its supposed long-term manufacturing advantage. IBM, GlobalFoundries, and other members of the Common Platform Initiative, had instead opted to pursue gate-first 28nm technology. The advantage of gate-first, at least in theory, is that it doesn't require customers to re-architect their products and doesn't negatively impact chip density.
GlobalFoundries talked up the advantages of GF over GL on multiple occasions, including during the company's September 2010 technology day.
The timing of the announcement and the reason for the change both make sense. It's been less than two years since GlobalFoundries opened for business; the company's executives likely decided it wasn't realistic to ramp 32nm SOI and multiple bulk silicon production nodes while simultaneously adopting the new rules and restrictions that governm 28nm gate-last manufacturing.
Now that GF is shipping 40nm-LP wafers and ramping 32nm SOI, 28nm-HP, 40nm-G and 28nm-SLP smoothly, it presumedly has more than enough time to begin work on the eventual 20nm gate-last transition. Yesterday's announcement won't have any impact on GlobalFoundries' 2011 roadmap and is not expected to disrupt the company's plans to move below the 28nm node.