Global Alliance: Intel, IBM, GlobalFoundries, TSMC, and Samsung Announce New Partnership

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News Posted: Wed, Sep 28 2011 2:26 PM
Five of the largest and most advanced semiconductor manufacturers have signed a joint development and research agreement in what might be a record-breaking partnership. It's not unusual to see IBM, Samsung, and GloFo pairing up—all three companies are part of the Common Platform Alliance--but the presence of Intel and TSMC is noteworthy.

The five companies have committed to a $4.4B investment in New York State that's intended to create 6900 jobs, including 2500 high-tech positions in Albany, East Fishkill, Utica, and Canandaigua (the author's home). As some of you will recall, GlobalFoundries is building its own new Fab 8 in New York State as well. The company began installing equipment earlier this year and will be capable of up to 60,000 wafer starts a month once the facility ramps up to full production.

"This unprecedented private investment in New York's economy will create thousands of jobs and make the state the epicenter for the next generation of computer chip technology," Governor Cuomo said. "IBM, which is celebrating 100 years in New York, Intel, which is making its most significant investment in New York, as well as TSMC, Global Foundries and Samsung now recognize that the state is on its way to becoming a premier location for jobs, which is why these companies are making this major investment.

In the last nine months, my administration has worked to create a more confident environment for doing business in New York, and major deals like this one prove that the state is truly open for business."

As part of the arrangement, Intel will build its 450mm East Coast Headquarters in Albany. Intel and TSMC have both been leading a push towards adopting 450mm wafer manufacturing while other companies (including IBM and GlobalFoundries) have maintained that there's little advantage in adopting the larger wafers given the enormous adoption costs.


Wafer sizes, compared to scale. Today, most manufacturing is done on 200mm or higher. Image courtesy of SemiWiki.

Intel's push for 450mm wafers is one reason why the company needs to sell Atom chips into the smartphone and tablet markets. 450mm wafers are more than twice the size of 300mm wafers. With process geometries continuing to shrink, Intel can look forward to a day when the number of chips it can pack on a wafer is 2-3x higher than it is now. That's a tremendous advantage—provided that demand for the company's products keeps pace with its manufacturing capability.

Paul Otellini, Intel Corporation President and CEO said, "The Global 450 Consortium is a critical element to moving the semiconductor industry to next generation wafer size. This new technology will reduce the cost of production, increase productivity for manufacturers and reduce our environmental footprint on a per chip basis. The involvement of the College for Nanoscale and Science Engineering and the State of New York will enable the industry to meet its goals."

This new project means all five companies are now working towards deploying 450mm wafers, though Intel and TSMC will likely lead the way as far as commercial production is concerned. The PR statement notes that IBM will also be working on "the next two generations of computer chips," but doesn't give specifics on whether this work is related to conventional process shrinks, fully depleted SOI, or 3D transistor technology. 
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@ Joel

"I recently read an article on another website that you work for, Extremetech.Com, : "Is 14nm the end of the road for silicon chips?" where the author talks about the difficulties of moving towards a smaller die shrink and the limitations Companies might face after 14nm (specifically Intel who has advanced the most). So I would think that All those leading chip developers joining force can help them more efficiently adjust to a new process but also the research and development will help Intel break that 14nm wall, right?"

http://www.extremetech.com/computing/97469-is-14nm-the-end-of-the-road-for-silicon-lithography

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akumu replied on Wed, Sep 28 2011 6:48 PM

Even worse news for AMD it seems.

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jonation replied on Wed, Sep 28 2011 10:05 PM

My nerd says YAY! But the other part of me is: "what about the other guys?"

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Joel H replied on Thu, Sep 29 2011 1:17 PM

Optimus, Akumu, Jonation:

This sort of research addresses common problems faced by everyone--to a certain extent, it's a win/win/win for all involved. The question here is "What bets are going to work out best?"

Here's an easy example of that. TSMC is moving towards using 3D chip packaging with through-silicon-vias (TSVs), where chip components are connected vertically. Intel is talking up 3D chip technology through the use of Tri-Gates (3D transistors). Both companies are claiming power consumption benefits and performance enhancements.

The question of which one is "better" (assuming both companies successfully implement them) may depend a lot more on the company's goals than on the technology at hand. Sometimes, things end up a wash. AMD moved to immersion lithography before Intel, for example, but both GlobalFoundries and Intel have ended up adopting both immersion lithography and double-patterning.

Pushing below 14nm is likely to be more of a steep slope than a brick wall. It's one thing to say "That's the end of scaling," but no one has come up with a credible alternative tech, yet.

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"Got It"

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