Processors have been getting smaller and smaller (while also faster and faster) for decades. In fact, that progression has never changed since the microprocessor was born. In general, they have been consuming less power as well, but everyone knows that there will be limits. One of the troubles with chips getting smaller and more powerful is the fragility of these chips. The smaller the manufacturing geomtries get, the less robust they are, and that has led to a number of research projects looking into the feasibility of creating self-repairing chips. It's not a completely fresh concept, and there has been previous success in self-repairing chips. But it looks like a breakthrough could be within reach.
The CRISP (Cutting edge Reconfigurable ICs for Stream Processing) project researches optimal utilization, efficient programming and dependability of reconfigurable many-cores for streaming applications. Its goal is to develop a single, highly scalable, reconfigurable system concept that can be used for a wide range of streaming applications; from low-cost consumer applications to very demanding specialty applications. The project consortium consists of Recore Systems (project leader), University of Twente, Atmel Automotive, Thales Netherlands, Tampere University of Technology, and NXP Semiconductors, and those are some pretty big names in this industry. There's clearly a lot of intelligence in the projector, and the team has managed to show off self-repairing chips at DATE 2011.
The self-repairing chip anticipates on the future, when further miniaturization makes on-chip components and connections more fragile. The CRISP consortium developed new concepts for run-time resource management to attain the goal of self-repair: while in operation, the chip tests cores and connections, and a resource manager dynamically assigns the chip's tasks to fault-free parts. This essentially allows chip makers to continue their race to producing chips that are downsized even further, without the same risks of breaking down prematurely. ith the right dependability infrastructure many-cores can be a solution', says Hans Kerkhoff. The chips have many cores; each core performs subtasks of a more complex application: for instance satellite navigation comprises many digital signal processing tasks. A run-time resource manager dynamically determines which core does which task. Cores can swap tasks; it does not make a difference which core does what, so cores can take over the tasks from failing cores and the chip can repair itself, extending its longevity.
It's a pretty tough thing to really wrap your mind around, but the idea is easy to support: smaller, more powerful chips, with less chance of breaking down. Hopefully this research will be transformed into real, commercial parts shortly -- our mobile phones could use the support (and the horsepower).