Next Generation Extreme Ultraviolet Chip Manufacturing Process Technology Closer to Reality
Extreme ultraviolet lithography (EUV) has been pegged as the most likely replacement for current 193nm technology, but repeated problems with ramping EUV have left it stalled on the runway. Now, for the first time, foundry technology developer ASML, which made headlines last year by partnering more closely with Intel and TSMC, believes it has cleared some of the hurdles between it and widespread EUV commercialization. The company predicts EUV technology could be ready for ramp by 2015.
Struggling Towards The Future
Two problems have stymied EUV deployment thus far. The first is the strength of the light source. Generating EUV at the intensities required for mass production can require as much as an order of magnitude more input power than conventional lithography. Second, there's the issue of exposure time. The two are linked -- a higher-power system can etch wafers more quickly, but the power requirements could edge into the kilowatt range for each piece of equipment. The NXE:3300, which ASML is shipping this year, will be capable of hitting 125 wafers per hour, once the company boosts the light source up to 250W. That boost is still off in the future -- current NXE:3300 machines are targeting 80W by the end of the year.
The ASML NXE:3100 -- the commercial prototype for the NXE:3300 available this year
Even 80W is still a significant improvement from the 55W demonstrated earlier this year, but Intel has recently stated that it needs EUV to be capable of 1000W of source power to hit all its production targets. EUV lithography also requires the use of a vacuum chamber under strictly controlled lighting conditions and near-perfect silicon -- even the smallest irregularities can throw off the etching process send defect density spiraling out of control.
ASML hopes to have EUV ready for production by 2015, because that's when the machines would need to be installed in order to be ready for the 10nm node. Thus far, designers have stretched traditional 193nm lithography by using what's called double patterning. Instead of doing a single exposure and etching an entire surface at once, two different masks -- think of these as stencils -- are laid across the surface and etched independently. The problem with double patterning is that masks must be aligned to nearly impossible tolerances in order to ensure chip features are etched accurately. In theory, more masks could be added, but each additional mask increases manufacturing time, drives up cost, and increases the likelihood of chip-killing defect densities.
If ASML's roadmap pans out, the company should be able to deliver commercial EUV hardware capable of handling some conventional lithography tasks by the time the 10nm node is ready, though no one is talking about hitting Intel's required 1000W source by that time. Having a roadmap to even 250W is a major accomplishment, but there's still a long way to go before EUV is ready for widespread deployment. Still, the technology should be ready to assist by the time it's needed, even if the full deployment schedule isn't known yet.